Asus ROG CROSSHAIR X670E GENE ROG CROSSHAIR X670E Series BIOS manual English - Page 50
SMT Control, Core Performance Boost, CPU Common Options, Auto], Thread Enablement, Performance
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SMT Control Can be used to disable symmetric multithreading. To re-enable SMT, a POWER CYCLE is needed after setting this item to [Auto]. Configuration options: [Disable] [Auto] Core Performance Boost Configuration options: [Disabled] [Auto] CPU Common Options Thread Enablement Performance Prefetcher settings L1 Stream HW Prefetcher Configuration options: [Disable] [Enable] [Auto] L2 Stream HW Prefetcher Configuration options: [Disable] [Enable] [Auto] L1 Stride Prefetcher Uses memory access history of individual instructions to fetch additional lines when each access is a constant distance from the previous. Configuration options: [Disable] [Enable] [Auto] L1 Region Prefetcher Uses memory access history to fetch additional lines when the data access for a given instruction tends to be followed by other data accesses. Configuration options: [Disable] [Enable] [Auto] L2 Up/Down Prefetcher Uses memory access history to determine whether to fetch the next or previous line for all memory accesses. Configuration options: [Disable] [Enable] [Auto] Core Watchdog Core Watchdog Timer Enable Configuration options: [Disabled] [Enabled] [Auto] The following items appear only when Core Watchdog Timer Enable is set to [Enabled]. Core Watchdog Timer Interval Configuration options: [Auto] [39.68us] [80.64us] [162.56us] [326.4us] [654.08us] [1.309ms] [2.620ms] [5.241ms] [10.484ms] [20.970ms] [40.64ms] [82.53ms] [166.37ms] [334.05ms] [669.41ms] [1.340s] [2.681s] [5.364s] [10.730s] [21.461s] Core Watchdog Timer Severity Configuration options: [No Error] [Transparent] [Corrected] [Deferred] [Uncorrected] [Fatal] [Auto] Platform First Error Handling Allows you to enable or disable PFEH, cloack individual banks, and mask deferred error interrupts from each bank. Configuration options: [Enabled] [Disabled] [Auto] 50 ROG CROSSHAIR X670E Series BIOS Manual