Asus TR-DLSR TR-DLSR User Manual - Page 54
Chip Configuration
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4. BIOS SETUP 4.4.1 Chip Configuration Video Memory Cache Mode [UC] USWC (uncacheable, speculative write combining) is a new cache technology for the video memory of the processor. It can greatly improve the display speed by caching the display data. You must set this to UC (uncacheable) if your display card cannot support this feature; otherwise your system may not boot. Configuration options: [UC] [USWC] Onboard PCI IDE Enable [Both] You can select to enable the primary IDE channel, both the primary and secondary channels, or disable both channels. Configuration options: [Both] [Primary] [Disabled] 4. BIOS SETUP Chip Configuration 54 ASUS TR-DLSR User's Manual
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ASUS TR-DLSR User’s Manual
54
4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
4.4.1
Chip Configuration
Video Memory Cache Mode [UC]
USWC (uncacheable, speculative write combining) is a new cache
technology for the video memory of the processor. It can greatly improve
the display speed by caching the display data. You must set this to UC
(uncacheable) if your display card cannot support this feature; otherwise
your system may not boot. Configuration options: [UC] [USWC]
Onboard PCI IDE Enable [Both]
You can select to enable the primary IDE channel, both the primary and
secondary channels, or disable both channels. Configuration options: [Both]
[Primary] [Disabled]