Biostar A785G3 Bios Setup - Page 33

A785G3/A780L3/A780L3G BIOS Manual DRAM Timing Configuration BIOS S ETUP UTILITY Perfo rmance DRAM Timing Config uration Mem ory CLK : CAS Latency(Tcl) : RAS /CAS Delay(Tr cd) : Row Precharge Ti me(Trp): Min Active RAS(T ras) : RAS /RAS Delay(Tr rd) : Row Cycle (Trc) : Com mand Rate(CR) : Wri te Recover Ti me(Twr): > Mem ory Configura tion > ECC Configuratio n > BIO STAR Memory I nsight Memory Clock Mode Mem clock Value DRAM Timing Mode [Auto] [ DDR3-800] [ Auto] S elect Screen S elect Item +- C hange Option F1 G eneral Help F1 0 S ave and Exit ES C E xit vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc. Memory Configuration Memor y Configurati on Bank Interleaving Chann el Interleavi ng Enabl e Clock to Al l DIMMs MemCl k Tristate C3 /ATLVID Memor y Hole Remapp ing DCT U nganged Mode Power Down Enable Pag e Smashing BIOS S ETUP UTILITY Perfo rmance [ Auto] [ XOR of Addre ss bit] [ Disabled] [ Disabled] [ Enabled] [ Always] [ Disabled] [ Disabled] Enab le Bank Memo ry Inte rleaving S elect Screen S elect Item +- C hange Option F1 G eneral Help F1 0 S ave and Exit ES C E xit vxx.xx (C)C opyright 198 5-200x, Amer ican Megatre nds, Inc. Bank Interleaving Bank Interleaving is an advanced chipset technique used to improve memory perform ance. Memory interleaving increases bandwidth by allowing simultaneous access to more than one piece ofmemory. Options: Auto (Default) 32