EVGA 132-YW-E179-TR User Guide - Page 68
MEM DDR, MHz, Memory Timing Setting, Optimal
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MEM (DDR), MHz Use the + or - keys to scroll through new values for the memory frequency or type in a new value. Note that the Actual MEM (DDR) reflects the actual frequency that takes effect when the system reboots. Memory Timing Setting Press Enter to display the Memory Timing Setting menu. Use this menu to set optimal timings or to manually enter timings. Phoenix - AwardBIOS CMOS Setup Utility Memory Timing Setting Parameters Settings Current Value Item Help Memory Timing Setting [Optimal] x tCL (CAS Latency) Auto(7) x tRCD Auto(7) x tRP Auto(7) x tRAS Auto(20) x Command Per Clock (CMD) Auto(1T) ** Advanced Memory Settings ** x tRRD Auto(4) x tRC Auto(27) x tWR Auto(10) x tWTR Auto(14) x tFAW Auto(21) x tREF Auto x tRFC Auto 7 7 7 20 1T 4 27 10 14 21 7.8uS 110ns Main Level Select [Expert] to enter timings manually Move Enter:Select +/-/PU/PD:Value F10:Save ESC:Exit F1:General Help F5:Previous Values F6:Fail-Safe Defaults F7:Optimized Defaults Optimal Use the Page Up and Page Down keys to select Optimal. Optimal prohibits you from manually setting any timing. All timing is set for optimal performance.