Gigabyte GA-6PXSV4 Manual - Page 57
IOH Configuration, IntelR VT for Directed I/O Configuration, MMCFG BASE Base address of the Memory
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IOH Configuration Intel(R) VT for Directed I/O Configuration VGA Priority Define the display device priority. Gen3 Equalization WA's Enable/DIsable the support for Gen3 Equalization Workaround. Options available: Enabled/Disabled. Default setting is Disabled. MMCFG BASE (Base address of the Memory Mapped Configuration Space) Configure the MMCFG base address. Options available: MMCFG CASE Chage TO 2G. Default setting is MMCFG CASE Chage TO 2G. IOH 0 PCIe port Bifurcation Control PCIE Slot1 Speed Options available: GEN1/GEN2/GEN3. PCIE Slot2 Speed Options available: GEN1/GEN2/GEN3. Intel(R) VT-d Enable/Disable Intel VT-d Technology function. Options available: Enabled/Disabled. Default setting is Disabled. ATS Support Enable/Disable VT-d Engine Aggress Translation Service (ATS) support. Options available: Enabled/Disabled. Default setting is Disabled. - 57 - BIOS Setup