Intel BLKD915PBLL Product Specification - Page 54
Interrupts
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Intel Desktop Board D915PBL Technical Product Specification 2.6 Interrupts The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the Advanced Programmable Interrupt Controller (APIC) portion of the ICH6-R component. The PIC is supported in Windows 98 SE and Windows ME and uses the first 16 interrupts. The APIC is supported in Windows 2000 and Windows XP and supports a total of 24 interrupts. Table 13. Interrupts IRQ System Resource NMI I/O channel check 0 Reserved, interval timer 1 Reserved, keyboard buffer full 2 Reserved, cascade interrupt from slave PIC 3 COM2 (Note 1) 4 COM1 (Note 1) 5 LPT2 (Plug and Play option)/User available 6 Diskette drive 7 LPT1 (Note 1) 8 Real-time clock 9 User available 10 User available 11 User available 12 Onboard mouse port (if present, else user available) 13 Reserved, math coprocessor 14 Primary IDE/Serial ATA (if present, else user available) 15 16 (Note 2) 17 (Note 2) 18 (Note 2) 19 (Note 2) 20 (Note 2) 21 (Note 2) 22 (Note 2) 23 (Note 2) Secondary IDE/Serial ATA (if present, else user available) User available (through PIRQA) User available (through PIRQB) User available (through PIRQC) User available (through PIRQD) User available (through PIRQE) User available (through PIRQF) User available (through PIRQG) User available (through PIRQH) Notes: 1. Default, but can be changed to another IRQ. 2. Available in APIC mode only. 54