Intel Pga478 Data Sheet - Page 64

Intel

®

Celeron

®

Processor 1.66 GHz/1.83 GHz—Thermal Specifications and Design

Considerations

Intel

®

Celeron

®

Processor 1.66 GHz/1.83 GHz

DS

January 2007

64

Order Number: 315876-002

5.1.2

Thermal Diode Offset

In order to improve the accuracy of diode based temperature measurements, a

temperature offset value (specified as T

offset

) is programmed into a Intel

®

Celeron

®

Processor 1.66 GHz/1.83 GHz Model Specific Register (MSR) which contains thermal

diode characterization data. During manufacturing, the processor thermal diode is

evaluated for its behavior relative to a theoretical diode. Using the equation above, the

temperature error created by the difference between n

trim

and the actual ideality of the

particular processor is calculated.

If the n

trim

value used to calculate T

offset

differs from the n

trim

value used in a

temperature sensing device, the T

error(nf)

may not be accurate. If desired, the T

offset

can be adjusted by calculating n

actual

and then recalculating the offset using the actual

n

trim

as defined in the temperature sensor manufacturers' datasheet.

The n

trim

used to calculate the Diode Correction Toffset are listed in

Table 19

.

5.1.3

Intel

®

Thermal Monitor

The Intel Thermal Monitor helps control the processor temperature by activating the

TCC (Thermal Control Circuit) when the processor silicon reaches its maximum junction

temperature. The temperature at which the Intel Thermal Monitor activates the TCC is

not user configurable. Bus traffic is snooped in the normal manner, and interrupt

requests are latched (and serviced during the time that the clocks are on) while the

TCC is active.

A thermal solution that is significantly under designed may not be capable of cooling

the processor even when the TCC is active continuously.

The Intel Thermal Monitor controls the processor temperature by modulating (starting

and stopping) the processor core clocks when the processor silicon reaches its

maximum operating temperature. The Intel Thermal Monitor uses two modes to

activate the TCC: Automatic mode and on-demand mode. If both modes are activated,

Automatic mode takes precedence.

Note:

The Intel thermal monitor automatic mode must be enabled through BIOS for the

processor to be operating within specifications.

There are two automatic modes called Intel Thermal Monitor 1 (TM1) and Intel Thermal

Monitor 2 (TM2). After Automatic mode is enabled, the TCC activates only when the

internal die temperature reaches the maximum allowed value for operation.

TM1 and TM2 can co-exist within the processor. If both TM1 and TM2 bits are enabled in

the auto-throttle MSR, TM2 takes precedence over TM1. However, if TM2 is not

sufficient to cool the processor below the maximum operating temperature, then TM1

also activates to help cool down the processor.

Note:

Intel recommends

both

Thermal Monitor 1 (TM1) and Thermal Monitor 2 (TM2) be

always enabled on Intel

®

Celeron

®

Processor 1.66 GHz/1.83 GHz.

Table 19.

Thermal “Diode” n

trim

and Diode Correction Toffset

Symbol

Parameter

Unit

n

trim

Diode ideality used to calculate T

offset

1.01

Section	Page
Intel® Celeron® Processor 1.66 GHz/ 1.83 GHz	1
Contents	3
Figures	3
Tables	3
Revision History	5
1.0 Introduction	6
Note: The term AGTL+ is used to refer to Assisted GTL+ signaling technology on the processor.	7
1.1 Terminology	7
Table 1. Terminology (Sheet 1 of 2)	7
1.2 References	8
Table 2. References	8
1.3 State of Data	9
Note: All references to the Intel® Celeron® Processor 1.66 GHz/1.83 GHz in this document apply to the Intel® Celeron® Processor 1.66 GHz/1.83 GHz only, unless otherwise specified.	9
2.0 Low Power Features	10
2.1 Clock Control and Low Power States	10
Figure 1. Package-Level Low Power States	10
Figure 2. Core Low Power States	11
2.1.1 Core Low Power States	11
2.1.1.1 C0 State - Normal State	11
2.1.1.2 C1/AutoHALT Powerdown State	11
2.1.1.3 C1/MWAIT Powerdown State	12
2.1.2 Package Low Power States	12
2.1.2.1 Normal State	12
2.1.2.2 Stop-Grant State	12
2.1.2.3 Stop Grant Snoop State	13
2.1.2.4 Sleep State	13
2.2 Enhanced Intel® SpeedStep® Technology (EIST)	13
2.3 Extended Halt State (C1E)	13
Note: The Extended HALT (C1E) state must be enabled for the processor to remain within its specifications.	13
3.0 Electrical Specifications	15
3.1 Front Side Bus and GTLREF	15
3.2 Power and Ground Pins	15
3.3 Decoupling Guidelines	15
3.3.1 VCC Decoupling	15
3.3.2 FSB AGTL+ Decoupling	16
3.3.3 FSB Clock (BCLK[1:0]) and Processor Clocking	16
3.4 Voltage Identification and Power Sequencing	16
Table 3. Intel® Celeron® Processor 1.66 GHz/1.83 GHz VID Map (Sheet 1 of 3)	16
3.5 Catastrophic Thermal Protection	18
3.6 Signal Terminations and Unused Pins	18
Note: The TEST1 and TEST2 pins have unique signal termination requirements. It is mandatory that the TEST2 pin have a 51 W +/-5% pull down resistor to Vss. Please refer to Table 11 for details.	18
3.7 FSB Frequency Select Signals (BSEL[2:0])	18
Table 4. BSEL[2:0] Encoding for BCLK Frequency	18
3.8 FSB Signal Groups	19
Table 5. FSB Pin Groups	19
3.9 CMOS Signals	20
3.10 Maximum Ratings	20
Table 6. Processor DC Absolute Maximum Ratings	20
3.11 Processor DC Specifications	20
Note: The processor DC specifications in this section are defined at the processor core (pads) unless noted otherwise.	20
Table 7. Voltage and Current Specifications for the Intel® Celeron® Processor 1.66 GHz/1.83 GHz	21
Figure 3. Active VCC and ICC Load Line for Intel® Celeron® Processor 1.66 GHz/1.83 GHz	22
Table 8. AGTL+ Signal Group DC Specifications (Sheet 1 of 2)	22
Table 9. CMOS Signal Group DC Specifications	23
Table 10. Open Drain Signal Group DC Specifications	24
4.0 Package Mechanical Specifications and Pin Information	25
4.1 Package Mechanical Specifications	25
4.1.1 Package Mechanical Drawings	25
Figure 4. Micro-FCPGA Package Top and Bottom Views	25
Figure 5. Micro-FCPGA Processor Package Drawing (Sheet 1)	26
Figure 6. Micro-FCPGA Processor Package Drawing (Sheet 2)	27
4.1.2 Processor Component Keep-Out Zones	27
4.1.3 Package Loading Specifications	28
4.1.4 Processor Mass Specifications	28
4.2 Processor Pin-Out and Pin List	28
Figure 7. The Coordinates of the Processor Pins as Viewed From the Top of the Package	29
4.2.1 Alphabetical Signals Reference	30
Table 11. Signal Description (Sheet 1 of 7)	30
Table 12. Quad-Pumped Signal Groups	32
Table 13. DINV[3:0]# Assignment To Data Bus	32
Table 14. Alphabetical Signal Listing (Sheet 1 of 12)	37
Table 15. Alphabetical Pin Listing (Sheet 1 of 12)	49
5.0 Thermal Specifications and Design Considerations	61
Table 16. Power Specifications for the Intel® Celeron® Processor 1.66 GHz/1.83 GHz (Sheet 1 of 2)	61
5.1 Thermal Specifications	62
5.1.1 Thermal Diode	62
Note: The reading of the external thermal sensor (on the motherboard) connected to the processor thermal diode signals, does not...	62
Table 17. Thermal Diode Interface	63
Table 18. Thermal “Diode” Parameters using Diode Mode	63
5.1.2 Thermal Diode Offset	64
Table 19. Thermal “Diode” ntrim and Diode Correction Toffset	64
5.1.3 Intel® Thermal Monitor	64
Note: The Intel thermal monitor automatic mode must be enabled through BIOS for the processor to be operating within specifications.	64
Note: Intel recommends both Thermal Monitor 1 (TM1) and Thermal Monitor 2 (TM2) be always enabled on Intel® Celeron® Processor 1.66 GHz/1.83 GHz.	64
Note: The Intel® Celeron® Processor 1.66 GHz/1.83 GHz only supports TM2 initiated voltage/ frequency transitions. Intel® Celeron...	65
Note: PROCHOT# is not asserted when the processor is in the Stop Grant, and Sleep, low power states (internal clocks stopped), h...	65
5.1.4 Digital Thermal Sensor	66
5.1.5 Out of Specification Detection	66
5.1.6 PROCHOT# Signal Pin	66
5.1.7 FORCEPR# Signal Pin	67

Intel Pga478 Data Sheet - Page 64

Thermal Diode Offset, Intel, Thermal Monitor

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