LG KG200 Service Manual - Page 64

5. CIRCUIT DIAGRAMS 1 A B C D 2 3 4 5 P19 N15 N16 N17 N18 N19 M16 M17 M18 MCCM0 MCDA0 MCDA1 MCDA2 MCDA3 MCPWRON MCWP/GPIO15 MCINS/GPIO14 MCCK P.2 EINT0_HEADSET P.5 ENIT1_FM_INT P.4 EINT2_CHARGER P.5 SD_CLK P.5 SD_CD P.5 SD_DAT3 P.5 SD_DAT2 P.5 SD_DAT1 P.5 SD_DAT0 P.5 SD_CMD P.3 USB_DM P.3 USB_DP P.3 /WATCHDOG VDD VDD 1 1 R104 100K R0402 R103 100K R0402 Watchdog reset output U100A MT6226M MT6227-A R18 P16 P17 /WATCHDOG USB_DP USB_DM 2 2 P.2 GPIO1_OP_EN M19 P.2 GPIO2_UR1_CTL L15 P.4 GPIO3_CM_PW_EN L16 P.5 GPIO4_FMRST C17 A19 B18 R101 N.C. R0402 X100 P.4 P.4 GPIO7_STATUS_EN P.2,5 GPIO8_SCL P.2,5 GPIO9_SDA GPIO0_LCM_BOOST_EN B17 A18 A17 U2 Crystal 32.768K P.6 26Mz A2 B1 C2 P.4 BBWAKEUP C1 D3 C100 C101 15pF C0402 15pF C0402 P.3 /JTRST P.3 JTCK P.3 JTDI P.3 JTMS P.3 JTDO P.3 JRTCK E4 E3 E2 E1 F5 F4 P.6 HB_TX P.6 LB_TX P.6 PCS_RX P.6 PA_EN P.6 BANDSW_DCS P.4 GPIO10_VIB_EN P.5 GPIO11_FMEN P.5 GPIO12_32KHz P.6 RFVCOEN P.6 LE P.6 SDATA P.6 SCLK High driving BPI port: 4mA/8mA F3 High driving BPI port: 4mA/8mA F2 High driving BPI port: 4mA/8mA G5 G4 G3 G2 G1 H5 H4 H3 RF 3-wire interface chip select 0 H1 RF 3-wire interface data output J5 RF 3-wire interface clock output J4 P.4 SIMRST P.4 SIMCLK P.4 SIMVCC P.4 GPIO32_SIMSEL P.4 SIMDATA SIM card reset output SIM card clock output SIM card supply power control SIM card supply power select SIM card data input/output L18 L17 K15 K16 K17 GPIO1/DICK GPIO2/DID GPIO3/DIMS GPIO4/DSP_CLK/DSPLCK GPIO5/AHB_CLK/DSPLD3 GPIO6/ARM_CLK/DSPLD2/CMFLASH GPIO7/SLOW_CLK/DSPLD1 GPIO8/SCL/DSPLD0 GPIO9/SDA/DSPLSYNC GPIO0/DSP_GPO3 SYSCLK XOUT XIN BBWAKEUP TESTMODE /JTRST JTCK JTDI JTMS JTDO JRTCK BPI_BUS0[HIGH DRIVING] BPI_BUS1[HIGH DRIVING] BPI_BUS2[HIGH DRIVING] BPI_BUS3 BPI_BUS4 BPI_BUS5 BPI_BUS6/GPIO10 BPI_BUS7/GPIO11/65MHz/26MHz BPI_BUS8/GPIO12/13MHz/32KHz BPI_BUS9/GPIO13/BSI_CS1 BSI_CS0 BSI_DATA BSI_CLK SIMRST SIMCLK SIMVCC SIMSEL/GPIO32 SIMDATA EINT3 EINT2 EINT1 EINT0 MFIQ/GPIO42 MIRQ/GPIO41/13MHz/32KHz V2 W1 U3 V1 R17 R5 ED0 ED1 ED2 ED3 ED4 ED5 ED6 ED7 ED8 ED9 ED10 ED11 ED12 ED13 ED14 ED15 LSCE1B/GPIO20/LPCE2B/TEVTVAL LSCE0B/GPIO19/TDMA_FS/TCTIRQ1 LSCK/GPIO16/TDMA_CK/TBTXEN LSA0/GPIO17/TDMA_D1/TDTIRQ LSDA/GPIO18/TDMA_D0/TCTIRQ2 PWM1/GPIO21/DSP_GPO0/TBTXFS PWM2/GPIO22/DSP_GPO1/TBRXEN ALERTER/GPIO23/DSP_GPO2/TBRXFS R16 R15 T19 T17 U19 U18 V18 W19 U17 V17 W17 T16 W16 T15 U15 V15 K3 K4 J3 J2 J1 R3 R2 T4 ED0 ED1 ED2 ED3 ED4 ED5 ED6 ED7 ED8 ED9 ED10 ED11 ED12 ED13 ED14 ED15 6 7 ED[0..15] P.3 GPIO18_LCM_ID P.4 PWM1_LCM_BL P.4 KP_BL_PWM1 P.4 8 Screw pad H2 TP-D1.0 H3 TP-D1.0 H4 TP-D1.0 H5 TP-D1.1 H6 TP-D1.1 TP-D1.1 TP-D1.1 TP-D0.8 TP-D1.1 TP-D1.1 9 FM1 FIDU-1.0R-2.0 FM2 FIDU-1.0R-2.0 FM3 FIDU-1.0R-2.0 FM4 FIDU-1.0R-2.0 FM5 FIDU-1.0R-2.0 FM6 FIDU-1.0R-2.0 TP25MIL TP25MIL TP25MIL TP25MIL TP25MIL TP25MIL KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 NLD7 NLD6 NLD5 NLD4 NLD3 NLD2 NLD1 NLD0 NRNB/GPIO25/DSP_TID1/MCU_TID1 NCLE/GPIO26/DSP_TID2/MCU_TID2 NALE/GPIO27/DSP_TID3/MCU_TID3 NWEB/GPIO28/DSP_TID4/MCU_DID NREB/GPIO29/DSP_TID5/MCU_DFS NCEB0/GPIO30/DSP_TID6/MCU_DCK IRDA_PDN/GPIO39 IRDA_TXD/GPIO38/URTS2 IRDA_RXD/GPIO37/UCTS2 UTXD2/GPIO36/URTS3/EINT4 URXD2/GPIO35/UCTS3/EINT6 URXD3/GPIO33/EINT7 UTXD3/GPIO34/EINT5 URTS1 UCTS1 UTXD1 URXD1 IBOOT(XAB) DAICLK/GPIO43/DSPLD7 DAIPCMOUT/GPIO44/DSPLD6 DAIPCMIN/GPIO45/DSPLD5 DAIRST/GPIO47/DSPLD4 DAISYNC/GPIO46/BFEPRBO D19 D16 E18 E17 E16 F19 F18 F17 F16 F15 G19 G18 G17 M5 Nand flash data port 7 M4 Nand flash data port 6 M3 Nand flash data port 5 N5 Nand flash data port 4 N4 Nand flash data port 3 N3 Nand flash data port 2 N2 Nand flash data port 1 N1 Nand flash data port 0 P5 Nand flash ready/busy status input P4 Nand flash command latch enable output P3 Nand flash address latch enable output P2 Nand flash write enable output P1 Nand flash read enable output R4 Nand flash chip enable output G16 G15 H17 J19 URTS3 J18 UCTS3 H15 H16 J17 UART1 request to send J16 UART1 clear to send K19 K18 E5 D17 DAI clock output D18 DAI pcm data output C19 DAI pcm data input C18 DAI reset signal input B19 NLD7 P.3,4 NLD6 P.3,4 NLD5 P.3,4 NLD4 P.3,4 NLD3 P.3,4 NLD2 P.3,4 NLD1 P.3,4 NLD0 P.3,4 NRNB P.3 NCLE P.3 NALE P.3 NWEB P.3 NREB P.3 NCEB P.3 KROW0 P.3 KROW1 P.3 KROW2 P.3 KROW3 P.3 KROW4 P.3 KROW5 P.3 KCOL0 P.3 KCOL1 P.3 KCOL2 P.3 KCOL3 P.3 KCOL6 P.4 URTS4 UCTS3 URTS1 UCTS1 TP108 TP40MIL TP20MIL TP107 TP114 TP20MIL TP40MIL TP25MIL TP20MIL TP113 TP20MIL TP25MIL UTXD1 P.2 URXD1 P.2 R102 100K R0402 TP111 TP60MIL TP-1.5 TP112 TP60MIL TP-1.5 10 STH1 TP-4.0 TP25MIL STH2 A TP-4.0 TP25MIL STH3 TP-4.0 TP25MIL STH4 TP-4.0 TP25MIL B C D /EPDN/GPO2/6.5MHz/26MHZ /ELB /EUB /ERD /EWR /ECS0 /ECS1 /ECS2 /ECS3 /ECS4/GPIO54 /ECS5/GPIO53 /ECS6/GPIO52 /ECS7/GPIO40 ECLK /EADV EWAIT LWRB LPA0 LRDB LRSTB LPCE0B LPCE1B/GPIO24/NCEB1/MCU_TID0 /SYSRST SRCLKENA/GPO0 SRCLKENAN/GPO1 SRCLKENAI/GPIO31 EA25/GPO4/13MHz/32KHz EA24/GPO3 EA23 EA22 EA21 EA20 EA19 EA18 EA17 EA16 EA15 EA14 EA13 EA12 EA11 EA10 EA9 EA8 EA7 EA6 EA5 EA4 EA3 EA2 EA1 EA0 T11 R14 T14 U14 W14 R13 T13 U13 V13 R12 T12 U12 W12 V11 U11 R11 L1 L2 L3 L4 L5 K2 U1 T1 T3 T2 W2 W3 U4 V4 W5 V5 U5 T5 W6 U6 T6 R6 V7 U7 T7 R7 W8 T8 R8 V9 U9 T9 W10 U10 T10 R10 E P.4 LWRB P.4 LPA0 P.4 LRDB P.4 LRSTB C112 P.4 LCM_CS N.C. C0402 P.4 /SYSRST P.4,6 VCXOEN P.4 GPIO31_CHR_CTL 2 .. 1 EA23 EA22 EA21 EA20 EA19 EA18 EA17 EA16 EA15 EA14 EA13 EA12 EA11 EA10 EA9 EA8 EA7 EA6 EA5 EA4 EA3 EA2 EA1 VMEM U100B VDD T100 N.C. C0402 EA[1..23] P.3 F W4 VDD33_EMI VDD33 F1 W7 VDD33_EMI VDD33 K1 W9 C102 W11 100nF W13 C0402 W15 VDD33_EMI VDD33_EMI VDD33_EMI VDD33_EMI VDD33 VDD33 VDD33 VDD33 R1 L19 E19 E15 C103 100nF C0402 W18 VDD33_EMI VDD33_MC M15 T18 VDD33_EMI U100C C104 1nF C0402 V6 VSS33_EMI P.2 MP3_OUTL B15 AU_MOUTL AFC_BYP A4 U8 V10 V12 V14 U16 V19 R19 VSS33_EMI VSS33_EMI VSS33_EMI VSS33_EMI VSS33_EMI VSS33_EMI VSS33_EMI VSS33/AVSS_RTC VSS33 VSS33 VSS33 VSS33_USB_MC VSS33 VSS33 D2 H2 M2 V3 P18 H18 B16 G VCORE AVDD_PLL B3 AVDD P.2 MP3_OUTR P.5 FM_INL P.5 FM_INR P.2 RECN0 A15 C105 N.C. (4n7F) C14 C0402 2 C1113 C13 R105 2 1 N.C. (4n7F)D13 51K R0402 C0402 C118 100nF B14 C0402 C119 A14 100nF C0402 B12 AU_MOUTR AU_M_BYPL AU_M_BYPR AU_R_BIAS AU_FMINL AU_FMINR AU_OUT0_N AFC B4 BUPAIP BUPAIN BUPAQN BUPAQP BDLAIP BDLAIN BDLAQN B8 A8 C8 D8 B9 A9 C9 VAFC P.6 I P.6 IB P.6 QB P.6 Q P.6 AVDD_MBUF C15 P.2 RECP0 A12 AU_OUT0_P BDLAQP D9 C16 D1 M1 C108 H19 100nF V8 C0402 V16 VDDK VDDK VDDK VDDK VDDK_EMI VDDK_EMI AVDD_BUF AVDD_GSM_RFTX AVDD_RFE AUX_RFE AVDD_AFE B13 D7 A7 C4 D11 A16 E14 VSS33 VSS33 AVSS_PLL AVSS_MBUF C3 D14 C109 100nF C0402 C106 100nF C0402 B100 MMZ1608S102C L0603 C120 N.C. C0402 MICBIASP MICBIASN C121 N.C. C0402 VREFN VREFP P.2 MICP0 P.2 MICN0 P.2 MICN1 C107 47nF C0402 C12 D12 C11 B11 D10 C10 B10 AU_MICBIAS_P AU_MICBIAS_N AU_VREF_N AU_VREF_P AU_VIN0_P AU_VIN0_N AU_VIN1_N APC AUXADIN0 AUXADIN1 AUXADIN2 AUXADIN3 AUXADIN4 AUXADIN5 AUXADIN6 B7 D6 C6 B6 A6 C5 B5 A5 VAPC P.6 ADC0_I- P.4 ADC1_I+ P.4 ADC2_TBAT P.4 ADC3_VCHG P.4 ADC5_USB P.3 ASS_ID P.2 AVSS_BUF A13 P.2 MICP1 A10 AU_VIN1_P AGND_AFE A11 PLL_OUT D5 AVSS_AFE E10 AGND_RFE E9 VUSB P15 VDD33_USB AVSS_GSMRFTX AVSS_RFE E8 C7 H VRTC B2 AVDD_RTC MT6226M MT6227-A C110 100nF C0402 C111 100nF C0402 MT6227.D5:N.C MT6219.D5:GND MT6226M MT6227-A 1 2 3 4 5 6 /ECS1_PSRAM P.3 /ECS0_FLASH P.3 /EWR P.3 /ERD P.3 /EUB P.3 /ELB P.3 GPO2_USB_EN P.4 VCORE P.2 CMDATA0 P.2 CMDATA1 P.2 CMDATA2 P.2 CMDATA3 P.2 CMDATA4 P.2 CMDATA5 P.2 CMDATA6 P.2 CMDATA7 P.2 CMDATA8 P.2 CMDATA9 P.2 CMVREF P.2 CMHREF P.2 CMRST P.2 CMPDN P.2 CMMCLK P.2 CMPCLK U100D L12 M12 M11 M10 M9 M8 L8 K8 J8 H8 CMDAT0/GPIO51/MCDA4 CMDAT1/GPIO50/MCDA5 CMDAT2 CMDAT3 CMDAT4 CMDAT5 CMDAT6 CMDAT7 CMDAT8 CMDAT9 H12 H11 CMVREF CMHREF VDD NC NC NC NC NC NC NC NC NC NC NC NC NC A1 A3 D4 D15 E6 E7 E11 E12 E13 F7 J15 K5 R9 J12 K12 H10 H9 CMRST/GPIO48 NLD8 CMPDN/GPIO49 NLD9 NLD10 NLD11 CMMCLK NLD12 CMPCLK NLD13 NLD14 NLD15 NLD16/GPIO55/MCDA6 NLD17/GPIO56/MCDA7/DSP_TID0 J9 J10 J11 K9 K11 L9 L10 L11 G6 F6 MT6226M MT6227-A 1 C114 1 C115 1 C116 1 C117 2 100nF C0402 2 100nF C0402 2 100nF C0402 2 100nF C0402 7330 FP2 Title MT6227 Size A3 Document Number 7330 R1A Date: Friday, September 29, 2006 Sheet 7 8 9 E F NLD8 P.4 G H 1 of 10 Rev R1A 7 - 65 -