MSI 745 ULTRA User Guide - Page 62

PCI IDE Bus Master, PCI Slot 1/5 IRQ, PCI Slot 2 IRQ, PCI Slot 3 IRQ, PCI Slot 4 IRQ, Set IRQs

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AMI BIOS Setup PCI IDE Bus Master Set this option to Enabled to specify that the IDE controller on the PCI local bus has bus mastering capability. Options are Disabled and Enabled. PCI Slot 1/5 IRQ, PCI Slot 2 IRQ, PCI Slot 3 IRQ, PCI Slot 4 IRQ This item specifies the IRQ line for each PCI slot. Settings: 3, 4, 5, 7, 9, 10, 11 and Auto. Selecting Auto allows BIOS to automatically determine the IRQ line for each PCI slot. Set IRQs to PCI or ISA Press to enter the sub-menu and the following screen appears: IRQ 3/4/5/7/9/10/11/14/15 These items specify the bus where the specified IRQ line is used. The settings determine if AMIBIOS should remove an IRQ from the pool of available IRQs passed to devices that are configurable by the system BIOS. The available IRQ pool is determined by reading the ESCD NVRAM. If more IRQs must be removed from the IRQ pool, the end user can use these settings to reserve the IRQ by assigning an ISA/EISA setting to it. Onboard I/O is configured by AMIBIOS. All IRQs used by onboard I/O are configured as PCI/PnP. If all IRQs are set to ISA/EISA, and IRQ 14/15 are allocated to the onboard PCI IDE, IRQ 9 will still be available for PCI and PnP devices. available settings: ISA/EISA and PCI/PnP. 3-19

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AMI BIOS Setup
3-19
PCI IDE Bus Master
Set this option to
Enabled
to specify that the IDE controller on the PCI local
bus has bus mastering capability.
Options are
Disabled
and
Enabled
.
PCI Slot 1/5 IRQ, PCI Slot 2 IRQ, PCI Slot 3 IRQ, PCI Slot 4 IRQ
This item specifies the IRQ line for each PCI slot.
Settings:
3, 4, 5, 7, 9, 10, 11
and
Auto
.
Selecting
Auto
allows BIOS to automatically determine the IRQ line
for each PCI slot.
Set IRQs to PCI or ISA
Press <Enter> to enter the sub-menu and the following screen appears:
IRQ 3/4/5/7/9/10/11/14/15
These items specify the bus where the specified IRQ line is used.
The settings determine if AMIBIOS should remove an IRQ from the
pool of available IRQs passed to devices that are configurable by the
system BIOS.
The available IRQ pool is determined by reading the
ESCD NVRAM.
If more IRQs must be removed from the IRQ pool, the
end user can use these settings to reserve the IRQ by assigning an
ISA/EISA
setting to it.
Onboard I/O is configured by AMIBIOS.
All
IRQs used by onboard I/O are configured as
PCI/PnP
.
If all IRQs are
set to ISA/EISA, and IRQ 14/15 are allocated to the onboard PCI IDE,
IRQ 9 will still be available for PCI and PnP devices.
available settings:
ISA/EISA
and
PCI/PnP
.