MSI K9AG NEO2-DIGITAL User Guide - Page 56

BIOS Setup, Advance DRAM Configuration, DRAM Timing, CAS# Latency Tcl, Min RAS# Active Time Tras

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Advance DRAM Configuration Press and the following sub-menu appears. BIOS Setup DRAM Timing The value in this field depends on performance parameters of the installed memory chips (DRAM). Do not change the value from the factory setting unless you install new memory that has a different performance rating than the original DRAMs. CAS# Latency (Tcl) W hen the DRAM Timing is set to [Manual], the field is adjustable. This controls the CAS latency, which determines the timing delay (in clock cycles) before SDRAM starts a read command after receiving it. Smaller clocks increase system performance while bigger clocks provide more stable system performance. M in RAS# Active Time (Tras) W hen the DRAM Timing is set to [Manual], the field is adjustable. This setting determines the time RAS takes to read from and write to a memory cell. RAS# Precharge Time (Trp) W hen the DRAM Timing is set to [Manual], this field is adjustable. This setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refresh may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. RAS# to CAS# Delay (Trcd) W hen the DRAM Timing is set to [Manual], this field is adjustable. This field allows you to set the number of cycles for a timing delay between the CAS and RAS strobe signals, used when DRAM is written to, read from or refreshed. Fast speed offers faster performance while slow speed offers more stable performance. 3-21

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3-21
BIOS Setup
Advance DRAM Configuration
Press <Enter> and the following sub-menu appears.
DRAM Timing
The value in this field depends on performance parameters of the installed
memory chips (DRAM). Do not change the value from the factory setting unless
you install new memory that has a different performance rating than the original
DRAMs.
CAS# Latency (Tcl)
When the
DRAM Timing
is set to [Manual], the field is adjustable. This controls
the CAS latency, which determines the timing delay (in clock cycles) before
SDRAM starts a read command after receiving it. Smaller clocks increase sys-
tem performance while bigger clocks provide more stable system performance.
Min RAS# Active Time (Tras)
When the
DRAM Timing
is set to [Manual], the field is adjustable. This setting
determines the time RAS takes to read from and write to a memory cell.
RAS# Precharge Time (Trp)
When the
DRAM Timing
is set to [Manual], this field is adjustable. This setting
controls the number of cycles for Row Address Strobe (RAS) to be allowed to
precharge. If insufficient time is allowed for the RAS to accumulate its charge
before DRAM refresh, refresh may be incomplete and DRAM may fail to retain
data. This item applies only when synchronous DRAM is installed in the system.
RAS# to CAS# Delay (Trcd)
When the
DRAM Timing
is set to [Manual], this field is adjustable. This field
allows you to set the number of cycles for a timing delay between the CAS and
RAS strobe signals, used when DRAM is written to, read from or refreshed.
Fast speed offers faster performance while slow speed offers more stable
performance.