MSI KT880 User Guide - Page 45

MS-7047 ATX Mainboard Advanced Chipset Features MSI Reminds You... Change these settings only if you are familiar with the chipset. Configure DRAM Timing by SPD Selects whether DRAM timing is controlled by the SPD (Serial Presence Detect) EEPROM on the DRAM module. Setting to [Auto By SPD] enables DRAM timings and the following related items to be determined by BIOS based on the configurations on the SPD. Selecting [Manual] allows users to configure the DRAM timings and the following related items manually. Setting options: [Manual], [Auto By SPD], [Turbo]. [Ultra]. SDRAM CAS# Latency This controls the timing delay (in clock cycles) before SDRAM starts a read command after receiving it. Settings: [1.5], [2.0], [2.5], [3.0]. [1.5] increases the system performance the most while [3.0] provides the most stable performance. SDRAM Bank Interleave This field selects 2-bank or 4-bank interleave for the installed SDRAM. Disable the function if 16MB SDRAM is installed. Settings: [Disabled], [2-Way] and [4-Way]. Precharge to Active (Trp) This setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refresh may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. Setting options: [2T], [3T], [4T], [5T]. Active to Precharge (Tras) This item controls the number of cycles for Row Address Strobe (RAS) to be allowed 3-10