MSI MS 7005 User Guide - Page 51

Advanced Chipset Features

Page 51 highlights

MS-7005 Micro ATX Mainboard Advanced Chipset Features MSI Reminds You... Change these settings only if you are familiar with the chipset. Advanced DRAM Control 1 Press and the following sub-menu appears: System Performance This setting particularly provided by SiS gives the proper suggestion for user to set timing. The Timings programmed into this register are dependent on the system design. Slower rates may be required in certain system designs to support loose layouts or slower memory. Setting options: Safe Mode, Normal Mode, Fast Mode, Turbo Mode, Ultra Mode. CAS Latency Setting The field controls the CAS latency, which determines the timing delay before SDRAM starts a read command after receiving it. Setting options: By SPD, 3T, 2.5T, 2T. 2T increases system performance while 2.5T provides more stable system performance. Setting to By SPD enables DRAM CAS# Latency automatically to be determined by BIOS based on the configurations on the SPD (Serial Presence Detect) EEPROM on the DRAM module. 3-12

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3-12
MS-7005 Micro ATX Mainboard
Advanced Chipset Features
MSI Reminds You...
Change these settings only if you are familiar with the chipset.
Advanced DRAM Control 1
Press <Enter> and the following sub-menu appears:
System Performance
This setting particularly provided by SiS gives the proper suggestion for
user to set timing. The Timings programmed into this register are depen-
dent on the system design.
Slower rates may be required in certain sys-
tem designs to support loose layouts or slower memory.
Setting options:
Safe Mode
,
Normal Mode
,
Fast Mode
,
Turbo Mode, Ultra Mode
.
CAS Latency Setting
The field controls the CAS latency, which determines the timing delay
before SDRAM starts a read command after receiving it. Setting options:
By SPD, 3T, 2.5T, 2T
.
2T
increases system performance while 2.5T provides
more stable system performance. Setting to By SPD enables DRAM CAS#
Latency automatically to be determined by BIOS based on the
configurations on the SPD (Serial Presence Detect) EEPROM on the DRAM
module.