MSI MS-7222-020 User Guide - Page 49

MS-7222 Micro-ATX Mainboard - v memory support

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MS-7222 Micro-ATX Mainboard AGP Driving Value This item specifies an AGP driving force. AGP Fast Write The item enables or disables the AGP Fast Write feature. The Fast Write technology allows CPU to write directly into the graphics controller without passing anything through system memory and improves 8x speed accordingly. Select [Auto] only when your AGP card supports the feature. Options: [Disabled], [Auto]. AGP Master 1 W/S Write When [Enabled] is selected, writeing to the AGP bus are executed with one wait state inserted. Setting options: [Enabled], [Disabled]. AGP Master 1 W/S Read When [Enabled] is selected, one wait state is inserted in the AGP read cycle. Setting options: [Enabled], [Disabled]. AGP 3.0 Calibration cycle This setting disables/enables the AGP auto calibration. Setting options: [Disabled], [Enabled]. VGA Share Memory Size The system shares memory to the onboard VGA card. This setting controls the exact memory size shared to the VGA card. Setting options: [Disabled], [16M], [32M], [64M]. VGA Share Memory Size Press and the following sub-menu appears. PCI Master 0 WS Write When [Enabled], writes to the PCI bus are executed with zero wait states. Setting options: [Enabled], [Disabled]. PCI Delay Transaction The chipset has an embedded 32-bit posted write buffer to support delay transactions cycles. Select [Enabled] to support compliance with PCI specification version 2.1. VLink mode selection This item lets you choose the speed mode between the North Bridge & South Bridge. Setting options: [By Auto], [Mode 0], [Mode 1]. 3-12

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3-12
MS-7222 Micro-ATX Mainboard
AGP Driving Value
This item specifies an AGP driving force.
AGP Fast Write
The item enables or disables the AGP Fast Write feature. The Fast Write technol-
ogy allows CPU to write directly into the graphics controller without passing
anything through system memory and improves 8x speed accordingly. Select
[Auto] only when your AGP card supports the feature. Options: [Disabled], [Auto].
AGP Master 1 W/S Write
When [Enabled] is selected, writeing to the AGP bus are executed with one wait
state inserted. Setting options: [Enabled], [Disabled].
AGP Master 1 W/S Read
When [Enabled]
is selected, one wait state is inserted in the AGP read cycle.
Setting options: [Enabled], [Disabled].
AGP 3.0 Calibration cycle
This setting disables/enables the AGP auto calibration. Setting options: [Disabled],
[Enabled].
VGA Share Memory Size
The system shares memory to the onboard VGA card. This setting controls the
exact memory size shared to the VGA card. Setting options: [Disabled], [16M],
[32M], [64M].
VGA Share Memory Size
Press <Enter> and the following sub-menu appears.
PCI Master 0 WS Write
When [Enabled], writes to the PCI bus are executed with zero wait states. Setting
options: [Enabled], [Disabled].
PCI Delay Transaction
The chipset has an embedded 32-bit posted write buffer to support delay trans-
actions cycles. Select [Enabled] to support compliance with PCI specification
version 2.1.
VLink mode selection
This item lets you choose the speed mode between the North Bridge & South
Bridge. Setting options: [By Auto], [Mode 0], [Mode 1].