Sony SA-WCT100 Service Manual - Page 50

Main Board, Adsst-avr-1115 Dsp - instructions

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SA-WCT100/SS-MCT100 • IC Pin Function Description MAIN BOARD IC2 ADSST-AVR-1115 (DSP) Pin No. 1 2 3 4, 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 to 26 27 28 29, 30 31 32 33, 34 35 36, 37 38 39 40 41 to 43 44 45 46 47 48 49 to 52 53 54 55 56, 57 58 59 60 61 62 63 64 Pin Name VDDINT CLKCFG0 CLKCFG1 BOOTCFG0, BOOTCFG1 GND VDDEXT GND VDDINT GND VDDINT GND VDDINT GND INT_REQ DIR_ERR AD7 GND VDDINT GND VDDEXT GND VDDINT AD6 to AD4 VDDINT GND AD3, AD2 VDDEXT GND AD1, AD0 WR* VDDINT GND RD* ALE AD15 to AD13 GND VDDEXT AD12 VDDINT GND AD11 to AD8 A16 VDDINT GND A17, A18 GND VDDEXT VDDINT GND PF_CE SPI_MAS DPSOA I/O Description - Power supply terminal (+1.2V) (for core) I Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal Fixed at "L" in this set I Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal Fixed at "H" in this set I Boot mode selection signal input terminal Fixed at "H" in this set - Ground terminal - Power supply terminal (+3.3V) (for I/0) - Ground terminal - Power supply terminal (+1.2V) (for core) - Ground terminal - Power supply terminal (+1.2V) (for core) - Ground terminal - Power supply terminal (+1.2V) (for core) - Ground terminal O Interrupt request signal output to the system controller I PLL lock error signal and data error flag input from the digital audio interface receiver I/O Two-way address and data bus terminal Not used - Ground terminal - Power supply terminal (+1.2V) (for core) - Ground terminal - Power supply terminal (+3.3V) (for I/0) - Ground terminal - Power supply terminal (+1.2V) (for core) I/O Two-way address and data bus terminal Not used - Power supply terminal (+1.2V) (for core) - Ground terminal I/O Two-way address and data bus terminal Not used - Power supply terminal (+3.3V) (for I/0) - Ground terminal I/O Two-way address and data bus terminal Not used O Write enable signal output terminal Not used - Power supply terminal (+1.2V) (for core) - Ground terminal O Read enable signal output terminal Not used O Address latch enable signal output terminal Not used I/O Two-way address and data bus terminal Not used - Ground terminal - Power supply terminal (+3.3V) (for I/0) I/O Two-way address and data bus terminal Not used - Power supply terminal (+1.2V) (for core) - Ground terminal I/O Two-way address and data bus terminal Not used - Not used - Power supply terminal (+1.2V) (for core) - Ground terminal - Not used - Ground terminal - Power supply terminal (+3.3V) (for I/0) - Power supply terminal (+1.2V) (for core) - Ground terminal - Not used - Not used O Audio serial data output to the stream processor 50

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SA-WCT100/SS-MCT100
50
• IC Pin Function Description
MAIN BOARD
IC2
ADSST-AVR-1115 (DSP)
Pin No.
Pin Name
I/O
Description
1
VDDINT
-
Power supply terminal (+1.2V) (for core)
2
CLKCFG0
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at "L" in this set
3
CLKCFG1
I
Core instruction rate to CLKIN (pin 142) ratio selection signal input terminal
Fixed at "H" in this set
4, 5
BOOTCFG0,
BOOTCFG1
I
Boot mode selection signal input terminal
Fixed at "H" in this set
6
GND
-
Ground terminal
7
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
8
GND
-
Ground terminal
9
VDDINT
-
Power supply terminal (+1.2V) (for core)
10
GND
-
Ground terminal
11
VDDINT
-
Power supply terminal (+1.2V) (for core)
12
GND
-
Ground terminal
13
VDDINT
-
Power supply terminal (+1.2V) (for core)
14
GND
-
Ground terminal
15
INT_REQ
O
Interrupt request signal output to the system controller
16
DIR_ERR
I
PLL lock error signal and data error
fl
ag input from the digital audio interface receiver
17
AD7
I/O
Two-way address and data bus terminal
Not used
18
GND
-
Ground terminal
19
VDDINT
-
Power supply terminal (+1.2V) (for core)
20
GND
-
Ground terminal
21
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
22
GND
-
Ground terminal
23
VDDINT
-
Power supply terminal (+1.2V) (for core)
24 to 26
AD6 to AD4
I/O
Two-way address and data bus terminal
Not used
27
VDDINT
-
Power supply terminal (+1.2V) (for core)
28
GND
-
Ground terminal
29, 30
AD3, AD2
I/O
Two-way address and data bus terminal
Not used
31
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
32
GND
-
Ground terminal
33, 34
AD1, AD0
I/O
Two-way address and data bus terminal
Not used
35
WR*
O
Write enable signal output terminal
Not used
36, 37
VDDINT
-
Power supply terminal (+1.2V) (for core)
38
GND
-
Ground terminal
39
RD*
O
Read enable signal output terminal
Not used
40
ALE
O
Address latch enable signal output terminal
Not used
41 to 43
AD15 to AD13
I/O
Two-way address and data bus terminal
Not used
44
GND
-
Ground terminal
45
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
46
AD12
I/O
Two-way address and data bus terminal
Not used
47
VDDINT
-
Power supply terminal (+1.2V) (for core)
48
GND
-
Ground terminal
49 to 52
AD11 to AD8
I/O
Two-way address and data bus terminal
Not used
53
A16
-
Not used
54
VDDINT
-
Power supply terminal (+1.2V) (for core)
55
GND
-
Ground terminal
56, 57
A17, A18
-
Not used
58
GND
-
Ground terminal
59
VDDEXT
-
Power supply terminal (+3.3V) (for I/0)
60
VDDINT
-
Power supply terminal (+1.2V) (for core)
61
GND
-
Ground terminal
62
PF_CE
-
Not used
63
SPI_MAS
-
Not used
64
DPSOA
O
Audio serial data output to the stream processor