ViewSonic VA550 Service Manual - Page 32

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Service Manual VA550 THEORY OF CIRCUIT OPERATION PLL ViewSonic Corporation >PU 00041 FC 450 003 3904 C. 10P 10 051 22P X 002 3904 26 C46 22u ffi C47 160 -G77 22 R198 22 T cl + 410 X.8901 _L. ..4.420121 R38 2 WOO -C- 31- V330 014/02 4 22 SG, GCL POEN 01.54 20 CLK- E TF8 VSSD 41SYNC 0000 EXTOL XF LI4ET C114 05102 VDDA 11 0490 12 OSC FUND LOCK I2CARD -4 1 . 41.0 = R29 518 6.41 (2012) 048 R35 Rid 45.9 N.0 1.23 1600 056 .1u 055 iSie 057 .1u .09 8481523 C17 1OP LOB .88211 (2012) 0-0 I .. 1. IC03 TLC2933/ WOO VCO OUT FIN-8 14 83/00 3 BIAS VCO 12 IN AGN 10 0/4(OFF RO7 3.30 LI 47 (0805) • .1 -- I ROG O 019 50V 20 2200P C18 10P 00150 RO5 750 CODE ENCODE CLKO The ICS1523 is a high performance frequency generator intended for line-locked and gen-locked high resolution video applications. It offers pixel clock outputs in both differential (to 250MHz) and single-ended (to 150MHz) formats. It is an effective clock solution for video projectors and displays at resolutions from VGA to beyond XGA. The advanced phase-locked loop utilizes either its internal programmable feed-back divider or an external divider. The device is programmed by a standard l2C-busTM serial interface. ICS1523 adopts an external feedback method to create the sampling clock supplied to the ND converter (AM30). When external divider changes, the sampling clock frequency is changed. The TLC2933 is designed for phase-locked-loop systems and is composed of a voltage-controlled oscillator (VCO) and an edge-triggered-type phase frequency detector (PFD). The Oscillator frequency range of VCO is set by an external bias resistor (R70). The high-speed PFD with internal change pump detects the phase difference between the reference frequency input and signal frequency input from the external divider. The main purpose of TLC2933 is to create the dot clock for the panel. Page 30 CONFIDENTIAL- DO NOT COPY

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Service
Manual
VA550
ViewSonic
Corporation
THEORY
OF
CIRCUIT
OPERATION
PLL
003
4
50
3904
518
6.41
(2012)
C46
22u
160
ffi
C47
G
-
77
—C
-
3
1—
22
2
R38
R35
048
WOO
V330
SG,
GCL
POEN
E
TF8
41SYNC
EXTOL
XF
LI4ET
VDDA
0490
OSC
014/02
4
01.5
4
CLK-
VSSD
22
R198
22
20
Rid
CODE
PU
>
10
C.
10P
ENCODE
002
051
22P
X
3904
T
c
l
0000
C114
05102
FUND
LOCK
I2CARD
45.9
N.0
1.23
1600
26
_L.
..4.420121
+
410
X.8901
11
12
—4
1
.
41.0
=
R29
CLKO
00041
056
055
057
.1u
iSie
.1u
LOB
.88211
(2012)
0-0
I
..
.09
8481523
IC03
TLC2933/
FC
C17
1OP
1.
C18
10P
WOO
83/00
BIAS
VCO
VCO
OUT
IN
AGN
10
FIN
-8
0/4(OFF
47
LI
(0805)
14
RO7
•
3.30
.1
--
3
I
12
ROG
019
50V
00150
O
20
2200P
RO5
750
The
ICS1523
is
a
high
performance
frequency
generator
intended
for
line
-locked
and
gen-locked
high
resolution
video
applications.
It
offers
pixel
clock
outputs
in
both
differential
(to
250MHz)
and
single
-ended
(to
150MHz)
formats.
It
is
an
effective
clock
solution
for
video
projectors
and
displays
at
resolutions
from
VGA
to
beyond
XGA.
The
advanced
phase
-locked
loop
utilizes
either
its
internal
programmable
feed
-back
divider
or
an
external
divider.
The
device
is
programmed
by
a
standard
l
2
C—busTM
serial
interface.
ICS1523
adopts
an
external
feedback
method
to
create
the
sampling
clock
supplied
to
the
ND
converter
(AM30).
When
external
divider
changes,
the
sampling
clock
frequency
is
changed.
The
TLC2933
is
designed
for
phase
-locked
-loop
systems
and
is
composed
of
a
voltage
-controlled
oscillator
(VCO)
and
an
edge
-triggered
-type
phase
frequency
detector
(PFD).
The
Oscillator
frequency
range
of
VCO
is
set
by
an
external
bias
resistor
(R70).
The
high-speed
PFD
with
internal
change
pump
detects
the
phase
difference
between
the
reference
frequency
input
and
signal
frequency
input
from
the
external
divider.
The
main
purpose
of
TLC2933
is
to
create
the
dot
clock
for
the
panel.
Page
30
CONFIDENTIAL-
DO
NOT
COPY