Asus A8V-E SE A8V-E SE User's Manual for English Edition - Page 66

Upstream LDT Bus Width [16 bit], Downstream LDT Bus Width [16 bit], LDT Bus Frequency [Auto], VLink

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Row precharge Time (Trp) [Auto] Sets the Row precharge time. Configuration options: [2] [3] [4] [5] [6] [7] 1T/2T Memory Timing [2T] Sets the memory timing. Configuration options: [1T] [2T] H/W DRAM Over 4G Remapping [Enabled] Enables or disables the hardware DRAM remapping when using 4G of system memory. Configuration options: [Disabled] [Enabled] MTRR mapping mode [Continous] Sets the MTRR mapping mode. Configuration options: [Continous] [Discrete] Master ECC Enable [Enable] Enables or disables the master ECC. Configuration options: [Disable] [Enable] ECC Memory Interlock [At Least One] Sets the ECC memory interlock. Configuration options: [At Least One] [All Are] Upstream LDT Bus Width [16 bit] Sets the upstream Lightning Data Transport (LDT) Bus Width. Configuration options: [ 8 bit] [16 bit] Downstream LDT Bus Width [16 bit] Sets the downstream Lightning Data Transport (LDT) Bus Width. Configuration options: [ 8 bit] [16 bit] LDT Bus Frequency [Auto] Sets the Lightning Data Transport (LDT) Bus frequency. Configuration options: [Auto] [1 GHz] [800 MHz] [600 MHz] [400 MHz] [200 MHz] VLink Mode Selection [By Auto] Sets the VLink mode. Configuration options: [By Auto] [Mode 0] [Mode 1] [Mode 2] [Mode 3] [Mode 4] 2-24 Chapter 2: BIOS setup

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Chapter 2: BIOS setup
Chapter 2: BIOS setup
Chapter 2: BIOS setup
Chapter 2: BIOS setup
Chapter 2: BIOS setup
Row precharge Time (Trp) [Auto]
Sets the Row precharge time. Configuration options: [2] [3] [4] [5]
[6] [7]
1T/2T Memory Timing [2T]
Sets the memory timing. Configuration options: [1T] [2T]
H/W DRAM Over 4G Remapping [Enabled]
Enables or disables the hardware DRAM remapping when using 4G of
system memory. Configuration options: [Disabled] [Enabled]
MTRR mapping mode [Continous]
Sets the MTRR mapping mode.
Configuration options: [Continous] [Discrete]
Master ECC Enable [Enable]
Enables or disables the master ECC.
Configuration options: [Disable] [Enable]
ECC Memory Interlock [At Least One]
Sets the ECC memory interlock. Configuration options: [At Least One]
[All Are]
Upstream LDT Bus Width [16 bit]
Upstream LDT Bus Width [16 bit]
Upstream LDT Bus Width [16 bit]
Upstream LDT Bus Width [16 bit]
Upstream LDT Bus Width [16 bit]
Sets the upstream Lightning Data Transport (LDT) Bus Width.
Configuration options: [ 8 bit] [16 bit]
Downstream LDT Bus Width [16 bit]
Downstream LDT Bus Width [16 bit]
Downstream LDT Bus Width [16 bit]
Downstream LDT Bus Width [16 bit]
Downstream LDT Bus Width [16 bit]
Sets the downstream Lightning Data Transport (LDT) Bus Width.
Configuration options: [ 8 bit] [16 bit]
LDT Bus Frequency [Auto]
LDT Bus Frequency [Auto]
LDT Bus Frequency [Auto]
LDT Bus Frequency [Auto]
LDT Bus Frequency [Auto]
Sets the Lightning Data Transport (LDT) Bus frequency.
Configuration options: [Auto] [1 GHz] [800 MHz] [600 MHz] [400 MHz]
[200 MHz]
VLink Mode Selection [By Auto]
VLink Mode Selection [By Auto]
VLink Mode Selection [By Auto]
VLink Mode Selection [By Auto]
VLink Mode Selection [By Auto]
Sets the VLink mode. Configuration options: [By Auto] [Mode 0] [Mode 1]
[Mode 2] [Mode 3] [Mode 4]