Asus P I-P55T2P4 User Manual - Page 17

III. INSTALLATION (Jumpers) III. INSTALLATION Compatible Cyrix CPU Identification The only Cyrix CPU that is supported on this motherboard is labeled Cyrix 6x86-PR166+ but must be Revision 2.7 or later. Look on the underside of the CPU for the serial number. The number should read G8DC6620A or later. 9. Memory Cacheable Size (JP4) The default of 64MB uses only the onboard TAG SRAM which allows cacheable memory up to 64MB. If you install DRAM above 64MB and wish to allow cacheable memory above 64MB, you need to install a TAG SRAM upgrade or use a cache module with an extended TAG SRAM (such as 256KB ASUS CM1 Rev 3.0 with 2 TAG SRAM's) but not both and set this jumper to 512MB. See page 12 for TAG SRAM upgrade and page 14 for cache module information. WARNING: If there are DRAM cache chips (MCache) either onboard or on the SIMM cache module instead of pipelined burst SRAM chips, this jumper must be set to 64MB. 512MB will make the system unstable. Mcache chips can only allow cacheable memory up to 64MB. See "Map of Motherboard" on page 4 for L2 cache locations. If the cache module that you install already have an extended tag, do not install another TAG SRAM into the TAG SRAM Upgrade Socket. Cacheable Size 64MB (BSRAM/MCache) 512MB (BSRAM Only) JP4 [1-2] (Default) [2-3] JP4 123 64MB Cacheable (Default) Burst SRAM or MCache JP4 123 512MB Cacheable Burst SRAM Only Cacheable Size (64MB/512MB) ASUS P/I-P55T2P4 User's Manual 11