Asus TS700-E4 User Manual - Page 114
Chipset Configuration
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4.4.2 Chipset Configuration This menu shows the chipset configuration settings. Select an item then press to display a pop-up menu with the configuration options. Advanced PhoenixBIOS Setup Utility Chipset Configuration Crystal Beach Configure Enable SERR Signal Condition Demand Scrub Enable Patrol Scrub Enable [Enabled] [Single Bit] [Enabled] [Enabled] 4GB PCI Hole Granularity Memory Branch Mode Branch 0 Rank Interleave Branch 0 Rank Sparing Branch 1 Rank Interleave Branch 1 Rank Sparing Enhanced x8 Detection Force ITK Config Clocking [256 MB] [Interleave] [4:1] [Disabled] [4:1] [Disabled] [Enabled] [Disabled] F1:Help ESC: Exit ↑↓ : Select Item →← : Select Menu -/+: Change Value Enter: Select SubMenu F5: Setup Defaults F10: Save and Exit Scroll down to display the following items: Advanced Processor Options FBDIMM(s) Thermal Throttling Open Loop Type [Open Loop] [Best Performan] F1:Help ESC: Exit ↑↓ : Select Item →← : Select Menu -/+: Change Value Enter: Select SubMenu Item Specific Help F5: Setup Defaults F10: Save and Exit Crystal Beach Configure Enable [Enabled] Allows you to enable or disable the Configuration/Memory mapped accesses to the Crystal Beach Configuration space located in Device 8, Fn 0, and Fn 1. Configuration options: [Disabled] [Enabled] 4-24 Chapter 4: BIOS setup