Asus TUEP2-M TUEP2-M User Manual - Page 61

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4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration SDRAM Capability This field displays the capability of the memory modules that you are using either PC100 or PC133. SDRAM Operating Mode This field displays the current SDRAM operating mode (PC100 or PC133) according to the SDRAM frequency you configure in the Advanced menu. SDRAM Timing [By SPD] This sets the optimal timings for items 4-7, depending on the memory modules that you are using. The default setting [By SPD] configures items 4-7 by reading the contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module stores critical parameter information about the module, such as memory type, size, speed, voltage interface, and module banks. Configuration options: [User Define] [By SPD] SDRAM CAS Latency This controls the latency between the SDRAM read command and the time that the data actually becomes available. SDRAM RAS to CAS Delay This controls the latency between the SDRAM active command and the read/write command. ASUS TUEP2-M User's Manual 61

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ASUS TUEP2-M User’s Manual
61
4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
4.4.1
Chip Configuration
SDRAM Capability
This field displays the capability of the memory modules that you are using
either PC100 or PC133.
SDRAM Operating Mode
This field displays the current SDRAM operating mode (PC100 or PC133)
according to the SDRAM frequency you configure in the
Advanced
menu.
SDRAM Timing [By SPD]
This sets the optimal timings for items 4-7, depending on the memory
modules that you are using. The default setting [By SPD] configures items
4-7 by reading the contents in the SPD (Serial Presence Detect) device. The
EEPROM on the memory module stores critical parameter information about
the module, such as memory type, size, speed, voltage interface, and module
banks. Configuration options: [User Define] [By SPD]
SDRAM CAS Latency
This controls the latency between the SDRAM read command and the time
that the data actually becomes available.
SDRAM RAS to CAS Delay
This controls the latency between the SDRAM active command and the
read/write command.