Gigabyte GA-7DXR User Manual - Page 104

BIOS Setup 16 Cycle 24 Cycle 32 Cycle 48 Cycle Disabled Set DRAM Idle Limit to 16 Cycle. Set DRAM Idle Limit to 24 Cycle. Set DRAM Idle Limit to 32 Cycle. Set DRAM Idle Limit to 48 Cycle. Disable this function. • DRAM Trc Timing Value This function specify the minimum time from activate to activate of the same bank. 3 Cycle 4 Cycle 5 Cycle 6 Cycle 7 Cycle 8 Cycle 9 Cycle 10 Cycle Set DRAM Trc Timing Value to 3 Cycle. Set DRAM Trc Timing Value to 4 Cycle. Set DRAM Trc Timing Value to 5 Cycle. Set DRAM Trc Timing Value to 6 Cycle. Set DRAM Trc Timing Value to 7 Cycle. Set DRAM Trc Timing Value to 8 Cycle. Set DRAM Trc Timing Value to 9 Cycle. Set DRAM Trc Timing Value to 10 Cycle. • DRAM Trp Timing Value This function specify the delay from precharge command to activate command. 1 Cycle 2 Cycle 3 Cycle 4 Cycle Set DRAM Trp Timing Value to 1 Cycle. Set DRAM Trp Timing Value to 2 Cycle. Set DRAM Trp Timing Value to 3 Cycle. Set DRAM Trp Timing Value to 4 Cycle. • DRAM Tras Timing Value This function specifies the minimum bank (active time: time from active to precharge of same bank). 2 Cycle 3 Cycle 4 Cycle 5 Cycle 6 Cycle 7 Cycle 8 Cycle 9 Cycle Set DRAM Tras Timing Value to 2 Cycle. Set DRAM Tras Timing Value to 3 Cycle. Set DRAM Tras Timing Value to 4 Cycle. Set DRAM Tras Timing Value to 5 Cycle. Set DRAM Tras Timing Value to 6 Cycle. Set DRAM Tras Timing Value to 7 Cycle. Set DRAM Tras Timing Value to 8 Cycle. Set DRAM Tras Timing Value to 9 Cycle. 98