Seagate ST1.2 ST1.2 Series Product Manual - Page 45

Configuration for PC card memory mode in 5V operation default

Page 45 highlights

060H 22H CISTPL_FUNCE: (Function Extension Tuple) 062H 03H TPL_LINK =3 bytes 064H 02H TUPLE_TYPE: (Extension Type) = 02 (Basic PC Card ATA Interface) 066H TPLFE_DATA V : Vpp[2::1] (bit0,1) = 00 (Vpp not required) 08H S : Silicon (bit2) = 0 (Rotating Device) U : Inique (bit3) = 0 (Single Drive) D : Dual Drive (bit4) = 0 (Single Drive) 068H TPLFE_DATA P0 : Sleep (bit0) = 1 (Support Sleep mode) P1 : Standby (bit1) = 1 (Support Standby mode) 0FH P2 : Idle (bit2) = 1 (Support Idle mode) P3 : Auto (bit 3) = 1 (Support Automatic Power Control) N : 3F7/377 (bit4) = 0 (Include 3F7h/377h for I/O Address) E : Index Emulate (bit5) = 0 (Index Emulation is not supported) I : IOIS16 (bit6) =0 06AH 1AH CISTPL_CONFIG (Configuration Tuple) 06CH 05H TPL_LINK = 5 bytes 06EH TPCC_SZ :(Size of Field Byte) 01H TPCC_RASZ (Size of TPCC_RADR) (bit0,1) = 1 (2 bytes) TPCC_RMSZ (Size of TPCC_RMSK) (bit 2..5) = 0 (1 byte) 070H 07H TPCC_LAST: (Last Entry Index) =07 072H 00H TPCC_RADR: (Low byte) (Base address of Configuration Register = 00h) 074H 02H TPCC_RADR: (High byte) (Base address of Configuration Register = 02h) 076H 0FH TPCC_RMSK: (Register Presence Mask) = 00001111b (200, 202, 204, 206) Configuration for PC card memory mode in 5V operation (default) 078H 1BH CISTPL_CFTABLE_ENTRY: (16 Bit PCCard Configuration Table Entry Tuple) 07AH 0CH TPCE_LINK = 0C bytes 07CH C0H TPCE_INDX: (Configuration Table Entry Tuple) Config Entry Number (bit0..5) = 00 (Memory Mode) Default (bit6) = 1 Interface (bit7) = 1 (Interface Field Exist) 07EH C0H TPCE_IF: (Interface Description Field) Interface Type (bit0..3) = 00 (Memory) BVDS active (bit4) = 0 WP active (bit5) = 0 READY active (bit6) = 1 MWAIT required (bit7) = 1 ST1.2 Series Product Manual, Rev. B 39

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ST1.2 Series Product Manual, Rev. B
39
060H
22H
CISTPL_FUNCE: (Function Extension Tuple)
062H
03H
TPL_LINK =3 bytes
064H
02H
TUPLE_TYPE: (Extension Type) = 02 (Basic PC Card ATA Interface)
066H
08H
TPLFE_DATA
V : Vpp[2::1] (bit0,1) = 00 (Vpp not required)
S : Silicon (bit2) = 0 (Rotating Device)
U : Inique (bit3) = 0 (Single Drive)
D : Dual Drive (bit4) = 0 (Single Drive)
068H
0FH
TPLFE_DATA
P0 : Sleep (bit0) = 1 (Support Sleep mode)
P1 : Standby (bit1) = 1 (Support Standby mode)
P2 : Idle (bit2) = 1 (Support Idle mode)
P3 : Auto (bit 3) = 1 (Support Automatic Power Control)
N
: 3F7/377 (bit4) = 0 (Include 3F7h/377h for I/O Address)
E
: Index Emulate (bit5) = 0 (Index Emulation is not supported)
I
: IOIS16 (bit6) =0
06AH
1AH
CISTPL_CONFIG (Configuration Tuple)
06CH
05H
TPL_LINK = 5 bytes
06EH
01H
TPCC_SZ :(Size of Field Byte)
TPCC_RASZ (Size of TPCC_RADR) (bit0,1) = 1 (2 bytes)
TPCC_RMSZ (Size of TPCC_RMSK) (bit 2..5) = 0 (1 byte)
070H
07H
TPCC_LAST: (Last Entry Index) =07
072H
00H
TPCC_RADR: (Low byte) (Base address of Configuration Register = 00h)
074H
02H
TPCC_RADR: (High byte) (Base address of Configuration Register = 02h)
076H
0FH
TPCC_RMSK: (Register Presence Mask) = 00001111b (200, 202, 204, 206)
Configuration for PC card memory mode in 5V operation (default)
078H
1BH
CISTPL_CFTABLE_ENTRY: (16 Bit PCCard Configuration Table Entry Tuple)
07AH
0CH
TPCE_LINK = 0C bytes
07CH
C0H
TPCE_INDX: (Configuration Table Entry Tuple)
Config Entry Number (bit0..5) = 00 (Memory Mode)
Default (bit6) = 1
Interface (bit7) = 1 (Interface Field Exist)
07EH
C0H
TPCE_IF: (Interface Description Field)
Interface Type (bit0..3) = 00 (Memory)
BVDS active (bit4) = 0
WP active (bit5) = 0
READY active (bit6) = 1
MWAIT required (bit7) = 1