Seagate ST1.2 ST1.2 Series Product Manual - Page 48

TPCE_IO: I/O Space Address required for this configuration

Page 48 highlights

0AEH 0B0H 0B2H 0B4H 0B6H 0B8H 0BAH 0BCH 0BEH 0C0H 0C2H 0C4H 99H 27H 55H 4DH 5DH B6H 1EH 64H F0H FFH FFH 20H TPCE_FS: (Feature Selection Byte) Power (bit0,1) = 01 (Vcc Only) Timing (bit2) = 0 I/O (bit3) = 0 Interrupt (bit4) = 0 Memory (bit5,6) = 01 Misc (bit7) = 1 TPCE_PD (Power Description Structure) TPCE_PD: Parameter Selection Byte NomV (bit0) =1 MinV (bit1) = 1 MaxV (bit2) =1 PeakI (bit5) =1 TPCE_PD: Power Parameter Definition (NomV) Exponent (bit 0..2) = 5 (1V) - ->5.0V Mantissa (bit3..6) = A (5.0) TPCE_PD: Power Parameter Definition (MinV) Exponent (bit 0..2) = 5 (1V) - ->4.5V Mantissa (bit3..6) = 9 (4.5) TPCE_PD: Power Parameter Definition (MaxV) Exponent (bit 0..2) = 5 (1V) - ->5.5V Mantissa (bit3..6) = C (5.5) TPCE_PD: Power Parameter Definition (PeakI) Exponent (bit 0..2) = 6 (100mA) - -+- ->330mA Mantissa (bit3..6) = 6 (3) + Extension (bit7) = 1 (Extension Byte Exists) + TPCE_PD: Extension = 1Eh = +30 - -+ TPCE_MS: (Memory Space Description Structure) TPCE_IO: (I/O Space Address required for this configuration) I/O Address Lines (bit0..4) =4 (16 byte boundary) Bus 16/8 (bit5,6) = 3 (Support 16/8 bit access) Range (bit7) = 0 TPCE_IR (Interrupt Request Description Structure) TPCE_IR: IRQ Line 0..15 (bit0..3) =0 MASK (bit4) = 1 Level (bit5) = 1 Pulse (bit6) = 1 Share (bit7) = 1 TPCE_IR+1: IRQ0..IRQ7 = All Supported TPCE_IR+2: IRQ8..IRQ15 = All Supported TPCE_MI :(Miscellaneous Features Field) Max Twin Card (bit0..2) = 0 Audio (bit3) = 0 Read Only (bit4) = 0 Power Down (bit5) = 1 (Support Power Down Mode) 42 ST1.2 Series Product Manual, Rev. B

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66

42
ST1.2 Series Product Manual, Rev. B
0AEH
99H
TPCE_FS: (Feature Selection Byte)
Power (bit0,1) = 01 (Vcc Only)
Timing (bit2) = 0
I/O (bit3) = 0
Interrupt (bit4) = 0
Memory (bit5,6) = 01
Misc (bit7) = 1
TPCE_PD (Power Description Structure)
0B0H
27H
TPCE_PD: Parameter Selection Byte
NomV (bit0) =1
MinV (bit1) = 1
MaxV (bit2) =1
PeakI (bit5) =1
0B2H
55H
TPCE_PD: Power Parameter Definition (NomV)
Exponent (bit 0..2) = 5 (1V)
- ->5.0V
Mantissa (bit3..6) = A (5.0)
0B4H
4DH
TPCE_PD: Power Parameter Definition (MinV)
Exponent (bit 0..2) = 5 (1V)
- ->4.5V
Mantissa (bit3..6) = 9 (4.5)
0B6H
5DH
TPCE_PD: Power Parameter Definition (MaxV)
Exponent (bit 0..2) = 5 (1V)
- ->5.5V
Mantissa (bit3..6) = C (5.5)
0B8H
B6H
TPCE_PD: Power Parameter Definition (PeakI)
Exponent (bit 0..2) = 6 (100mA)
- -+- ->330mA
Mantissa (bit3..6) =
6 (3)
+
Extension (bit7) = 1 (Extension Byte Exists)
+
0BAH
1EH
TPCE_PD: Extension = 1Eh = +30
- -+
TPCE_MS: (Memory Space Description Structure)
0BCH
64H
TPCE_IO: (I/O Space Address required for this configuration)
I/O Address Lines (bit0..4) =4 (16 byte boundary)
Bus 16/8 (bit5,6) = 3 (Support 16/8 bit access)
Range (bit7) = 0
TPCE_IR (Interrupt Request Description Structure)
0BEH
F0H
TPCE_IR: IRQ Line 0..15 (bit0..3) =0
MASK (bit4) = 1
Level
(bit5) = 1
Pulse
(bit6) = 1
Share (bit7) = 1
0C0H
FFH
TPCE_IR+1: IRQ0..IRQ7
= All Supported
0C2H
FFH
TPCE_IR+2: IRQ8..IRQ15
= All Supported
0C4H
20H
TPCE_MI :(Miscellaneous Features Field)
Max Twin Card (bit0..2) = 0
Audio
(bit3)
= 0
Read Only
(bit4)
= 0
Power Down
(bit5)
= 1 (Support Power Down Mode)