AMD AX2000DMT3C User Guide - Page 14

QuantiSpeed™ Architecture Summary, Overview, - motherboard

Get AMD AX2000DMT3C - Athlon XP 1.67 GHz Processor PDF manuals and user guides View all AMD AX2000DMT3C manuals
Add to My Manuals
Save this manual to your list of manuals

Page 14 highlights

Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 24309E-March 2002 The AMD Athlon XP processor model 6 is binary-compatible with existing x86 software and backwards compatible with applications optimized for MMX™, SSE, and 3DNow! technology. Using a data format and Single-Instruction Multiple-Data (SIMD) operations based on the MMX instruction model, the AMD Athlon XP processor model 6 can produce as many as four, 32-bit, single-precision floating-point results per clock cycle. The 3DNow! Professional technology implemented in the AMD Athlon XP processor model 6 includes new integer multimedia instructions and software-directed data movement instructions for optimizing such applications as digital content creation and streaming video for the internet, as well as new instructions for Digital Signal Processing (DSP)/communications applications. 1.1 QuantiSpeed™ Architecture Summary The following features summarize the AMD Athlon XP processor model 6 QuantiSpeed architecture: ■ An advanced nine-issue, superpipelined, superscalar x86 processor microarchitecture designed for increased Instructions Per Cycle (IPC) and high clock frequencies ■ Fully pipelined floating-point unit that executes all x87 (floating-point), MMX, SSE and 3DNow! instructions ■ Hardware data pre-fetch that increases and optimizes performance on high-end software applications utilizing high-bandwidth system capabilities ■ Advanced two-level Translation Look-aside Buffer (TLB) structures for both enhanced data and instruction address translation. The AMD Athlon XP processor model 6 with QuantiSpeed architecture incorporates three TLB optimizations: the L1 DTLB increases from 32 to 40 entries, the L2 ITLB and L2 DTLB both use exclusive architecture, and the TLB entries can be speculatively loaded. The AMD Athlon XP processor model 6 delivers excellent system performance in a cost-effective, industry-standard form factor. The AMD Athlon processor model 6 is compatible with motherboards based on Socket A. Figure 1 on page 3 shows a typical AMD Athlon processor system block diagram. 2 Overview Chapter 1

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
2
Overview
Chapter 1
AMD Athlon™ XP Processor Model 6 Data Sheet
24309E—March 2002
Preliminary Information
The AMD Athlon XP processor model 6 is binary-compatible
with existing x86 software and backwards compatible with
applications
optimized
for
MMX™,
SSE,
and
3DNow!
technology. Using a data format and Single-Instruction
Multiple-Data
(SIMD)
operations
based
on
the
MMX
instruction model, the AMD Athlon XP processor model 6 can
produce as many as four, 32-bit, single-precision floating-point
results per clock cycle. The 3DNow! Professional technology
implemented in the AMD Athlon XP processor model 6
includes
new
integer
multimedia
instructions
and
software-directed data movement instructions for optimizing
such applications as digital content creation and streaming
video for the internet, as well as new instructions for Digital
Signal Processing (DSP)/communications applications.
1.1
QuantiSpeed™ Architecture Summary
The
following
features
summarize
the
AMD Athlon XP
processor model 6 QuantiSpeed architecture:
■
An advanced nine-issue, superpipelined, superscalar x86
processor
microarchitecture
designed
for
increased
Instructions Per Cycle (IPC) and high clock frequencies
■
Fully pipelined floating-point unit that executes all x87
(floating-point), MMX
,
SSE and 3DNow! instructions
■
Hardware data pre-fetch that increases and optimizes
performance on high-end software applications utilizing
high-bandwidth system capabilities
■
Advanced two-level Translation Look-aside Buffer (TLB)
structures for both enhanced data and instruction address
translation. The AMD Athlon XP processor model 6 with
QuantiSpeed
architecture
incorporates
three
TLB
optimizations: the L1 DTLB increases from 32 to 40 entries,
the L2 ITLB and L2 DTLB both use exclusive architecture,
and the TLB entries can be speculatively loaded.
The AMD Athlon XP processor model 6 delivers excellent
system performance in a cost-effective, industry-standard form
factor. The AMD Athlon processor model 6 is compatible with
motherboards based on Socket A.
Figure 1 on page 3 shows a typical AMD Athlon processor
system block diagram.