AMD AX2000DMT3C User Guide - Page 21

Power Management, 4.1 Power Management States

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24309E-March 2002 Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet 4 Power Management This chapter describes the power management control system of the AMD Athlon™ XP processor model 6. The power management features of the processor are compliant with the ACPI 1.0b and ACPI 2.0 specifications. 4.1 Power Management States The AMD Athlon XP processor model 6 supports low-power Halt and Stop Grant states. These states are used by Advanced Configuration and Power Interface (ACPI) enabled operating systems for processor power management. Figure 3 shows the power management states of the processor. The figure includes the ACPI "Cx" naming convention for these states. Execute HLT C1 C0 Halt SMI#, INTR, NMI, INIT#, RESET# Working4 STPCLK# deasserted STPCLK# asserted (Read PLVL2 register or throttling) Probe Serviced Incoming Probe Probe State1 STPCSLTKP#CLaKs#serdteeads2serted 3 Incoming Probe Probe Serviced C2 Stop Grant Cache Snoopable STPCSLTKP#CaLsKs#erdteedasserted S1 Stop Grant Cache Not Snoopable Sleep Note: The AMD AthlonTM System Bus is connected during the following states: 1) The Probe state 2) During transitions between the Halt state and the C2 Stop Grant state 3) During transitions between the C2 Stop Grant state and the Halt state 4) C0 Working state Legend Hardware transitions Software transitions Figure 3. AMD Athlon™ XP Processor Model 6 Power Management States Chapter 4 Power Management 9

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Chapter 4
Power Management
9
24309E—March 2002
AMD Athlon™ XP Processor Model 6 Data Sheet
Preliminary Information
4
Power Management
This chapter describes the power management control system
of the AMD Athlon™ XP processor model 6. The power
management features of the processor are compliant with the
ACPI 1.0b and ACPI 2.0 specifications.
4.1
Power Management States
The AMD Athlon XP processor model 6 supports low-power
Halt and Stop Grant states. These states are used by Advanced
Configuration and Power Interface (ACPI) enabled operating
systems for processor power management.
Figure 3
shows the power management states of the processor.
The figure includes the ACPI “Cx” naming convention for these
states.
Figure 3.
AMD Athlon™ XP Processor Model 6 Power Management States
C1
Halt
C0
Working
4
Execute HLT
SMI#,
INTR, NMI, INIT#, RESET#
Incoming Probe
P
r
o
b
e
S
e
r
v
i
c
e
d
STPCLK# asserted
STPC
L
K
#
asserted
2
STPCLK# deas
serted
3
C2
Stop Grant
Cache Snoopable
Incoming Probe
Probe Serviced
Probe
State
1
STPCLK# deasserted
(Read PLVL2 register
or throttling)
S1
Stop Grant
Cache Not Snoopable
Sleep
STPCLK#
asserted
STPCLK# deasserted
Note:
The AMD Athlon
TM
System Bus is connected during the following states:
1)
The Probe state
2)
During transitions between the Halt state and the C2 Stop Grant state
3)
During transitions between the C2 Stop Grant state and the Halt state
4)
C0 Working state
Software transitions
Hardware transitions
Legend