AMD AX2000DMT3C User Guide - Page 83

FLUSH# Pin, IGNNE# Pin, JTAG Pins, K7CLKOUT and K7CLKOUT# Pins, Key Pins, connector. Pull TDI, TCK

Page 83 highlights

24309E-March 2002 Preliminary Information AMD Athlon™ XP Processor Model 6 Data Sheet FLUSH# Pin IGNNE# Pin INIT# Pin INTR Pin JTAG Pins K7CLKOUT and K7CLKOUT# Pins Key Pins The processor FID[3:0] outputs are open drain and 2.5 V tolerant. To prevent damage to the processor, if these signals are pulled High to above 2.5 V, they must be electrically isolated from the processor. For information about the FID[3:0] isolation circuit, see the AMD Athlon™ Processor-Based Motherboard Design Guide, order# 24363. See "Frequency Identification (FID[3:0])" on page 27 for the DC characteristics for FID[3:0]. FLUSH# must be tied to VCC_CORE with a pullup resistor. If a debug connector is implemented, FLUSH# is routed to the debug connector. IGNNE# is an input from the system that tells the processor to ignore numeric errors. INIT# is an input from the system that resets the integer registers without affecting the floating-point registers or the internal caches. Execution starts at 0_FFFF_FFF0h. INTR is an input from the system that causes the processor to start an interrupt acknowledge transaction that fetches the 8-bit interrupt vector and starts execution at that location. TCK, TMS, TDI, TRST#, and TDO are the JTAG interface. Connect these pins directly to the motherboard debug connector. Pull TDI, TCK, TMS, and TRST# up to VCC_CORE with pullup resistors. K7CLKOUT and K7CLKOUT# are each run for two to three inches and then terminated with a resistor pair: 100 ohms to VCC_CORE and 100 ohms to VSS. The effective termination resistance and voltage are 50 ohms and VCC_CORE/2. These 16 locations are for processor type keying for forwards and backwards compatibility (G7, G9, G15, G17, G23, G25, N7, Q7, Y7, AA7, AG7, AG9, AG15, AG17, AG27, and AG29). Motherboard designers should treat key pins like NC (No Connect) pins. A socket designer has the option of creating a top mold piece that allows PGA key pins only where designated. However, sockets that populate all 16 key pins must be allowed, so the motherboard must always provide for pins at all key pin locations. Chapter 10 Pin Descriptions 71

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Chapter 10
Pin Descriptions
71
24309E—March 2002
AMD Athlon™ XP Processor Model 6 Data Sheet
Preliminary Information
The processor FID[3:0] outputs are open drain and 2.5 V
tolerant. To prevent damage to the processor, if these signals
are pulled High to above 2.5 V, they must be electrically
isolated from the processor. For information about the FID[3:0]
isolation circuit, see the
AMD Athlon™ Processor-Based
Motherboard Design Guide
, order# 24363.
See “Frequency Identification (FID[3:0])” on page 27 for the
DC characteristics for FID[3:0].
FLUSH# Pin
FLUSH# must be tied to VCC_CORE with a pullup resistor. If a
debug connector is implemented, FLUSH# is routed to the
debug connector.
IGNNE# Pin
IGNNE# is an input from the system that tells the processor to
ignore numeric errors.
INIT# Pin
INIT# is an input from the system that resets the integer
registers without affecting the floating-point registers or the
internal caches. Execution starts at 0_FFFF_FFF0h.
INTR Pin
INTR is an input from the system that causes the processor to
start an interrupt acknowledge transaction that fetches the
8-bit interrupt vector and starts execution at that location.
JTAG Pins
TCK, TMS, TDI, TRST#, and TDO are the JTAG interface.
Connect these pins directly to the motherboard debug
connector. Pull TDI, TCK, TMS, and TRST# up to VCC_CORE
with pullup resistors.
K7CLKOUT and
K7CLKOUT# Pins
K7CLKOUT and K7CLKOUT# are each run for two to three
inches and then terminated with a resistor pair: 100 ohms to
VCC_CORE and 100 ohms to VSS. The effective termination
resistance and voltage are 50 ohms and VCC_CORE/2.
Key Pins
These 16 locations are for processor type keying for forwards
and backwards compatibility (G7, G9, G15, G17, G23, G25, N7,
Q7, Y7, AA7, AG7, AG9, AG15, AG17, AG27, and AG29).
Motherboard designers should treat key pins like NC (No
Connect) pins. A socket designer has the option of creating a
top mold piece that allows PGA key pins only where designated.
However, sockets that populate all 16 key pins must be allowed,
so the motherboard must always provide for pins at all key pin
locations.