ASRock H510M-HDV/M.2 SE Software/BIOS Setup Guide - Page 28
Intel Thermal Velocity Boost Voltage Optimizations, DRAM Timing Configuration
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Processors supporting the ITBMT 3.0 feature contain at least one processor core whose maximum ratio is higher than the others. Configuration options: [Enabled] [Disabled] Intel Thermal Velocity Boost Voltage Optimizations This service controls thermal based voltage optimizations for processors that implement the Intel Thermal Velocity Boost (TVB) feature. Configuration options: [Enabled] [Disabled] DRAM Configuration Memory Information Allows you to browse the serial presence detect (SPD) and Intel extreme memory profile (XMP) for memory modules. DRAM Timing Configuration Load XMP Setting Allows you to load XMP settings to overclock the memory and perform beyond standard specifications. Configuration options: [Auto] [XMP 2.0 Profile 1] DRAM Frequency If [Auto] is selected, the motherboard will detect the memory module(s) inserted and assign the appropriate frequency automatically. DRAM Gear Mode Allows you to select the DRAM Gear Mode. High gear is good for high frequency. Configuration options: [Auto] [Gear 1] [Gear 2] Primary Timing CAS# Latency (tCL) The time between sending a column address to the memory and the beginning of the data in response. RAS# to CAS# Delay and Row Precharge (tRCDtRP) RAS# to CAS# Delay : The number of clock cycles required between the opening of a row of memory and accessing columns within it. Row Precharge: The number of clock cycles required between the issuing of the precharge command and opening the next row. 24