Acer Aspire 4743Z Aspire 4743 and 4743Z Notebook Series Service Guide - Page 205

Table 4-4. POST Codes POST Code Function 0x98 Search for option ROMs. Rom scan the area from C800h for a length of BCP_ROM_Scan_Size (or to E000h by default) on every 2K boundary, looking for add on cards that need initialization. Phase Component LBT Core 0x93 Build the MPTABLE for multi-processor boards LBT Core 0xD9 IPMI late init 0x9C Set up Power Management. Initiate power -management state machine. 0xC7 Late note dock init 0x9E Enable hardware interrupts 0xA0 Setup time tick for current date/time 0xA2 Setup Numlock indicator. Display a message if key switch is locked. 0xA4 Initialize typematic rate 0xDB StrongROM Test 0xE2 OEM security key test 0xC2 Write PEM errors. 0xBA Initialize the SMBIOS header and sub-structures. 0xC3 Display PEM errors. 0xA8 Overwrite the "Press F2 for Setup" prompt with spaces, erasing it from the screen. 0xAA Scan the key buffer to see if the F2 key was struck after keyboard interrupts were enabled. If an F2 keystroke is found, set a flag. 0xE1 Start Periodic Timer (TC Subscribe) 0xAC Check if "Enter SETUP" is pressed. 0x8F Count the number of ATA drives in the system and update the number in bdaFdiskcount. 0x91 Configure the local bus IDE timing register based on the drives attached to it. 0x9F Check the total number of Fast Disks (ATA and SCSI) and update the bdaFdiskCount. 0xD7 Check if FirstWare HPA exists 0xAE Clear ConfigFailedBit and InPostBit in CMOS. 0xB0 Check for errors and decide if needs to run Setup. 0xB2 Change status bits in CMOS and/or the TrustedCore data area to reflect the fact that POST is complete. Troubleshooting 4-31