Asus CUV266 CUV266 User Manual - Page 64

Chip Configuration

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4. BIOS SETUP 4.4.1 Chip Configuration 4. BIOS SETUP Chip Configuration (Scroll down to see more items as shown) SDRAM Configuration [By SPD] This sets the optimal timings for items 2-5, depending on the memory modules that you are using. The default setting is [By SPD], which configures items 2-5 by reading the contents in the SPD (Serial Presence Detect) device. The EEPROM on the memory module stores critical parameter information about the module, such as memory type, size, speed, voltage interface, and module banks. Configuration options: [User Defined] [7ns (143MHz)] [8ns (125MHz)] [By SPD] SDRAM CAS Latency [3T] This controls the latency between the SDRAM read command and the time that the data actually becomes available. NOTE: This field appears only when you set the SDRAM Configuration to [User Defined]. SDRAM RAS Precharge Time [3T] This controls the idle clocks after issuing a precharge command to the SDRAM. NOTE: This field appears only when you set the SDRAM Configuration to [User Defined]. 64 ASUS CUV266 User's Manual

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ASUS CUV266 User’s Manual
64
4. BIOS SETUP
4. BIOS SETUP
Chip Configuration
SDRAM Configuration [By SPD]
This sets the optimal timings for items 2–5, depending on the memory
modules that you are using. The default setting is [By SPD], which configures
items 2–5 by reading the contents in the SPD (Serial Presence Detect) device.
The EEPROM on the memory module stores critical parameter information
about the module, such as memory type, size, speed, voltage interface, and
module banks. Configuration options: [User Defined] [7ns (143MHz)] [8ns
(125MHz)] [By SPD]
SDRAM CAS Latency [3T]
This controls the latency between the SDRAM read command and the
time that the data actually becomes available.
NOTE:
This field appears
only when you set the
SDRAM Configuration
to [User Defined].
SDRAM RAS Precharge Time [3T]
This controls the idle clocks after issuing a precharge command to the
SDRAM.
NOTE:
This field appears only when you set the
SDRAM
Configuration
to [User Defined].
4.4.1
Chip Configuration
(Scroll down to see more items as shown)