Asus K8N K8N User Guide - Page 51

Chipset - audio driver

Page 51 highlights

GART Error Reporting [Disabled] Enables or disables the GART Error Reporting feature. This option should always be disabled for normal operation. Device driver developers may enable it for testing purpose. Configuration options: [Disabled] [Enabled] 2.4.4 Chipset The items in this menu show the chipset-related information auto-detected by BIOS. Memory CLK : 200 MHz CAS Latency : 2.5 DRAM RAS TO CAS Delay : 3 CLK DRAM ACTIVE TIME : 8 CLK DRAM RAS PRECHANGE TIME : 3 CLK MemClock Mode [Auto] CAS Latency (CL) [Auto] DRAM CAS to CAS Delay [Auto] DRAM RAS PRECHANGE Time [Auto] DRAM ACTIVE TIME [Auto] 1T/2T Timing [Auto] Master ECC Enabled [Disabled] Audio CODEC Interface [Auto] Primary Video [PCI] Aperture Size [ 128 MB] AGP FW Enable [Auto] AGP SideBand Address [Auto] Onboard Device USB Configuration MEMCLK can be set by the code using AUTO, or if you use LIMIT, you can set one of the standard values. Memclock Mode [ Auto] Allows you to set the memory clock mode. Set by the code using [Auto] or select [Manual] to set using one of the standard values. Configuration options: [Auto] [Manual] MemClock Value [200 MHz] Sets the Memory clock value. This item appears only when the MemClock Mode item is set to Manual. Configuration options: [200 MHz] [266 MHz] [333 MHz] [400 MHz] CAS Latency (CL) [Auto] Sets the CAS Latency value. Configuration options: [Auto] [2.0] [3.0] [2.5] DRAM RAS TO CAS Delay [Auto] Sets the DRAM RAS TO CAS Delay. Configuration options: [Auto] [2 CLK] [3 CLK] [4 CLK] [5 CLK] [6 CLK] ASUS K8N motherboard 2-17

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ASUS K8N motherboard
2-17
Memory CLK
: 200 MHz
CAS Latency
: 2.5
DRAM RAS TO CAS Delay : 3 CLK
DRAM ACTIVE TIME : 8 CLK
DRAM RAS PRECHANGE TIME : 3 CLK
MemClock Mode
[Auto]
CAS Latency (CL)
[Auto]
DRAM CAS to CAS Delay
[Auto]
DRAM RAS PRECHANGE Time
[Auto]
DRAM ACTIVE TIME
[Auto]
1T/2T Timing
[Auto]
Master ECC Enabled
[Disabled]
Audio CODEC Interface
[Auto]
Primary Video
[PCI]
Aperture Size
[ 128 MB]
AGP FW Enable
[Auto]
AGP SideBand Address
[Auto]
Onboard Device
USB Configuration
MEMCLK can be set
by the code using
AUTO, or if you use
LIMIT, you can set
one of the standard
values.
2.4.4
Chipset
The items in this menu show the chipset-related information auto-detected by
BIOS.
Memclock Mode [ Auto]
Allows you to set the memory clock mode. Set by the code using [Auto] or select
[Manual] to set using one of the standard values.
Configuration options: [Auto] [Manual]
MemClock Value [200 MHz]
Sets the Memory clock value. This item appears only when the
MemClock Mode
item is set to Manual. Configuration options: [200 MHz] [266 MHz] [333 MHz]
[400 MHz]
CAS Latency (CL) [Auto]
Sets the CAS Latency value. Configuration options: [Auto] [2.0] [3.0] [2.5]
DRAM RAS TO CAS Delay [Auto]
Sets the DRAM RAS TO CAS Delay.
Configuration options: [Auto] [2 CLK] [3 CLK] [4 CLK] [5 CLK] [6 CLK]
GART Error Reporting [Disabled]
Enables or disables the GART Error Reporting feature. This option should always
be disabled for normal operation. Device driver developers may enable it for
testing purpose. Configuration options: [Disabled] [Enabled]