Asus ROG STRIX X670E-I GAMING WIFI ROG STRIX X670E Series BIOS Manual English - Page 57

Allows you to select the MBIST Test Mode - Interface Mode Tests Single

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DDR Security This item allows you to configure DDR Security. TSME Configuration options: [Auto] [Enabled] [Disabled] Data Scramble Configuration options: [Enabled] [Disabled] [Auto] DDR Addressing Options This item allows you to configure DDR Addressing Options. Chipselect Interleaving Interleave memory blocks across the DRAM chip selects for node 0. Configuration options: [Disabled] [Auto] Address Hash Bank Configuration options: [Disabled] [Enabled] [Auto] Address Hash CS Configuration options: [Auto] [Enabled] [Disabled] Address Hash Subchannel Configuration options: [Auto] [Enabled] [Disabled] BankSwapMode Configuration options: [Auto] [Disabled] [SwapCPU] [Swap APU] DDR Training Options This item allows you to configure DDR Training Options. DFE Read Training Perform 2D Read Training with DFE on. Configuration options: [Auto] [Enable] [Disable] DRAM PDA Enumerate ID Programming Mode Configuration options: [Auto] [Sequential PDA enumeration mode] [Legacy PDA enumeration mode] TX DFE Taps Specifies the number of TX DFE taps. Configuration options: [Auto] [1 Tap] [2 Taps] [3 Taps] [4 Taps] PPT Control Configuration options: [Auto] [Disabled] DDR Memory MBIST This item allows you to configure DDR Memory MBIST. MBIST Enable Allows you to enable or disable Memory MBIST. Configuration options: [Disabled] [Enabled] [Auto] The following items appear only when MBIST Enable is set to [Enabled]. MBIST Test Mode Allows you to select the MBIST Test Mode - Interface Mode (Tests Single and Multiple CS transactions and Basic Connectivity) or Data Eye Mode (Measures Voltage vs. Timing). Configuration options: [Interface Mode] [Data Eye Mode] [Both] [Auto] MBIST Aggressors Configuration options: [Disabled] [Enabled] [Auto] ROG STRIX X670E Series BIOS Manual 57

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ROG STRIX X670E Series BIOS Manual
57
DDR Security
This item allows you to configure DDR Security.
TSME
Configuration options: [Auto] [Enabled] [Disabled]
Data Scramble
Configuration options: [Enabled] [Disabled] [Auto]
DDR Addressing Options
This item allows you to configure DDR Addressing Options.
Chipselect Interleaving
Interleave memory blocks across the DRAM chip selects for node 0.
Configuration options: [Disabled] [Auto]
Address Hash Bank
Configuration options: [Disabled] [Enabled] [Auto]
Address Hash CS
Configuration options: [Auto] [Enabled] [Disabled]
Address Hash Subchannel
Configuration options: [Auto] [Enabled] [Disabled]
BankSwapMode
Configuration options: [Auto] [Disabled] [SwapCPU] [Swap APU]
DDR Training Options
This item allows you to configure DDR Training Options.
DFE Read Training
Perform 2D Read Training with DFE on.
Configuration options: [Auto] [Enable] [Disable]
DRAM PDA Enumerate ID Programming Mode
Configuration options: [Auto] [Sequential PDA enumeration mode] [Legacy
PDA enumeration mode]
TX DFE Taps
Specifies the number of TX DFE taps.
Configuration options: [Auto] [1 Tap] [2 Taps] [3 Taps] [4 Taps]
PPT Control
Configuration options: [Auto] [Disabled]
DDR Memory MBIST
This item allows you to configure DDR Memory MBIST.
MBIST Enable
Allows you to enable or disable Memory MBIST.
Configuration options: [Disabled] [Enabled] [Auto]
The following items appear only when
MBIST Enable
is set to
[Enabled]
.
MBIST Test Mode
Allows you to select the MBIST Test Mode - Interface Mode (Tests Single and
Multiple CS transactions and Basic Connectivity) or Data Eye Mode (Measures
Voltage vs. Timing).
Configuration options: [Interface Mode] [Data Eye Mode] [Both] [Auto]
MBIST Aggressors
Configuration options: [Disabled] [Enabled] [Auto]