Asus SABERTOOTH Z77 User Manual - Page 77

DRAM CLK Period Auto Transmitter Slew(CHA) Auto Transmitter Slew(CHB) Auto Receiver Slew(CHA) Auto Receiver Slew(CHB) Auto MCH Duty Sense (CHA) Auto MCH Duty Sense (CHB) Auto Channel A DIMM Control Enable Both . . . Channel B DIMM Control Enable Both . . . DRAM Read Additional Swizzle Auto DRAM Write Additional Swizzle Auto →←: Select Screen ↑↓: Select Item Enter: Select +/-: Change Opt. F1: General Help F2: Previous Values F5: Optimized Defaults F10: Save ESC: Exit F12: Print Screen Version 2.10.1208. Copyright (C) 2012 American Megatrends, Inc. Primary Timings DRAM CAS# Latency [Auto Auto] [3 DRAM Clock] - [15 DRAM Clock]。 DRAM RAS# to CAS# Delay [Auto Auto] [4 DRAM Clock] - [15 DRAM Clock]。 DRAM RAS# PRE Time [Auto Auto] [4 DRAM Clock] - [15 DRAM Clock]。 DRAM RAS# ACT Time [Auto Auto] [4 DRAM Clock] - [40 DRAM Clock]。 DRAM COMMAND Mode [Auto Auto] [1 DRAM Clock] [2 DRAM Clock] [3 DRAM Clock]。 Secondary Timings DRAM RAS# to RAS# Delay [Auto Auto] [4 DRAM Clock] - [7 DRAM Clock]。 DRAM REF Cycle Time [Auto Auto] [48 DRAM Clock] - [511 DRAM Clock]。 DRAM Refresh Interval [Auto Auto] [48 DRAM Clock] - [511 DRAM Clock]。 DRAM WRITE Recovery Time [Auto Auto] [5 DRAM Clock] - [31 DRAM Clock]。 DRAM READ to PRE Time [Auto Auto] [4 DRAM Clock] - [15 DRAM Clock]。 DRAM FOUR ACT WIN Time [Auto Auto] [16 DRAM Clock] - [63 DRAM Clock]。 第三章 華碩 SABERTOOTH Z77 3-11