Biostar I915P-A7 I915P-A7 BIOS guide. - Page 17
Memory Hole At 15m-16m
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1915P-A7 BIOS Manual 4.4 DRAM RAS# PRECHARGE If an insufficient number of cycles is allowed for RAS to accumulate its charge before DRAM refresh, the refresh may be incomplete, and the DRAM may fail to retain data. Fast gives faster performance; and Slow gives more stable performance. This field applies only when synchronous DRAM is installed in the system. The Choices: 4 (default), 3, and 2. 4.5 PRECHARGE DELAY (TRAS) This item controls the number of DRAM clocks to activate the precharge delay. The Choices: 8 (default), 7, 6, and 5. 4.6 SYSTEM MEMORY FREQUENCY This item allows you to select the Memory Frequency. The Choices: Auto (default), DDR266, DDR300, and DDR400. 4.7 SLP_S4# ASSERTION WIDTH This item sets the minimum assertion width of the SLP-S4# signal to guarantee the DRAM has been safely power-cycled. 4.8 SYSTEM BIOS CACHEABLE Selecting Enabled allows you caching of the system BIOS ROM at F0000h~FFFFFh, resulting a better system performance. However, if any program writes to this memory area, a system error may result. The Choices: Enabled (default), Disabled. 4.9 VIDEO BIOS CACHEABLE Select Enabled allows caching of the video BIOS, resulting a better system performance. However, if any program writes to this memory area, a system error may result. The Choices: Disabled, Enabled (default). 4.10 MEMORY HOLE AT 15M-16M You can reserve this area of system memory for ISA adapter ROM. When this area is reserved it cannot be cached. The user information of peripherals that need to use this area of system memory usually2 discussed their memory requirements. The Choices: Disabled (default), Enabled. 16