Biostar IDEQ 220K BIOS MANUAL - Page 20
DRAM CONFIGURATION, Max Memclock MHz, CAS# Latency, Min RAS# active time tRAS
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K8VBK-S7 BIOS Setup 4.2 DRAM CONFIGURATION 4.2.1 4.2.2 Max Memclock (MHz) Places an artifical memory clock limit on the system. Memory is prevented from running faster than this frequency. The Choices: 200 (Default), 166, 133, and 100. CAS# Latency This field specify the cas# latency, i.e. cas# to read data valid. The Choices: CL=2.5 (Default), CL=3.0, CL=2.0 4.2.3 RAS# to CAS# Delay (tRCD) This field specifies the RAS# to CAS# Delay to read/ write command to the same bank. Typically -20 Nsec. The Choices: 3 BUS CLOCKS (Default), 2 BUS CLOCKS, 4 BUS CLOCKS, 5 BUS CLOCKS, 6 BUS CLOCKS, 7 BUS CLOCKS 4.2.4 Min RAS# active time (tRAS) This field specifies the minimum RAS# active time. Typically -45-60 Nsec. The Choices: 6 BUS CLOCKS (Default), 13 BUS CLOCKS, 14 BUS CLOCKS, 15 BUS CLOCKS. 4.2.5 Row Precharge Time (tRP) This field specifies the Row precharge Time. Precharge to Active or Auto-Refresh of the same bank. Typically 20-24 Nsec. The Choices: 3 BUS CLOCKS (Default), 2 BUS CLOCKS, 4 BUS CLOCKS, 5 BUS CLOCKS, 6 BUS CLOCKS. 19