Dell PowerEdge T420 Owner's Manual - Page 70

Operating Frequency in MT/s, Dense Configuration Optimized - memory configuration

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• number of DIMMs populated per channel • DIMM operating voltage • system profile selected (for example, Performance Optimized, Custom, or Dense Configuration Optimized) • maximum supported DIMM frequency of the processor The following table shows the memory populations and operating frequencies for the supported configurations. DIMM Type DIMMs Populated/ Channel UDIMM ECC 1 2 RDIMM 1 2 Operating Frequency (in MT/s) 1.5 V 1.35 V 1333, 1066, and 800 1333, 1066, and 800 1333, 1066, and 800 1333, 1066, and 800 1600, 1333, 1066, and 800 1333, 1066, and 800 1333, 1066, and 800 1066 and 800 1600, 1333, 1066, and 800 1333, 1066, and 800 1066 and 800 1066 and 800 Maximum DIMM Rank/ Channel Dual rank Dual rank Dual rank Quad rank Dual rank Quad rank The system contains 12 memory sockets split into two sets of six sockets, one set per processor. Each six-socket set is organized into three channels. In each channel, the release levers of the first socket is marked white and the second black. NOTE: DIMMs in sockets A1 to A6 are assigned to processor 1 and DIMMs in sockets B1 to B6 are assigned to processor 2. 70

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•
number of DIMMs populated per channel
•
DIMM operating voltage
•
system profile selected (for example,
Performance Optimized
,
Custom
, or
Dense Configuration Optimized
)
•
maximum supported DIMM frequency of the processor
The following table shows the memory populations and operating frequencies for the supported configurations.
DIMM Type
DIMMs
Populated/
Channel
Operating Frequency (in MT/s)
Maximum DIMM Rank/
Channel
1.5 V
1.35 V
UDIMM ECC
1
1333, 1066, and 800
1333, 1066, and 800
Dual rank
2
1333, 1066, and 800
1333, 1066, and 800
Dual rank
RDIMM
1
1600, 1333, 1066, and 800
1333, 1066, and 800
1333, 1066, and 800
1066 and 800
Dual rank
Quad rank
2
1600, 1333, 1066, and 800
1066 and 800
1333, 1066, and 800
1066 and 800
Dual rank
Quad rank
The system contains 12 memory sockets split into two sets of six sockets, one set per processor. Each six-socket set is
organized into three channels. In each channel, the release levers of the first socket is marked white and the second
black.
NOTE:
DIMMs in sockets A1 to A6 are assigned to processor 1 and DIMMs in sockets B1 to B6 are assigned to
processor 2.
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