Gateway E-9220T Gateway E-9220T Server User Guide - Page 98
Electronic specifications, Memory map, Interrupts
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Electronic specifications Electronic specifications Memory map Address Range (hex) Amount 0 to 07FFFFh 640 KB 0A0000h to 0BFFFFh 128 KB 0C0000h and 0DFFFFh 128 KB 0E0000h to 0FFFFFh 128 KB 0E0000h to 0EFFFFh 2 MB FC000000h to FFFFFFFFh 64 MB Function DOS region, base system memory Video or SMM memory Expansion card BIOS and buffer area System BIOS Extended system BIOS PCI memory space Interrupts The following table reflects a typical configuration, but you can change these interrupts. Use this information to determine how to program each interrupt. The actual interrupt map is defined using configuration registers in the ICH5-R (I/O controller). I/O Redirection Registers in the I/O APIC are provided for each interrupt signal. The signals define hardware interrupt signal characteristics for APIC messages sent to local APIC(s). Important If you disable an IDE controller to free the interrupt for that controller, you must physically unplug the IDE cable from the system board. Simply disabling the drive by configuring the BIOS does not make the interrupt available. Interrupt IRQ0 IRQ1 IRQ2 IRQ3 IRQ4 IRQ5 Description Timer/counter, HPET #0 in legacy replacement Mode. In APIC mode, cascade from 8259 controller 1 Keyboard controller Slave controller INTR output. In APIC mode Timer/counter, HPET #0 Serial port A Serial port B Parallel port www.gateway.com 93