HP ProLiant DL280 Memory technology evolution: an overview of system memory te - Page 2

Introduction, Basic DRAM operation, Main memory

Get HP ProLiant DL280 PDF manuals and user guides View all HP ProLiant DL280 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 2 highlights

Introduction This paper gives you an overview of the memory technologies that we use in HP ProLiant servers, and describes how we evaluate these technologies. It also briefly summarizes the evolution of server memory and explores the different dynamic random access memory (DRAM) technologies. Processors use system memory to store the operating system, applications, and data they use and manipulate. As a result, speed and bandwidth of the system memory controls application performance. Over the years, the need for greater memory bandwidth has driven system memory evolution from asynchronous DRAM technologies to high-bandwidth synchronous DRAM (SDRAM), and finally to today's Double Data Rate (DDR) SDRAM technologies. Our challenge going forward is to continue to increase system performance by narrowing the performance gap between processors and memory. The processor-memory performance gap occurs when the processor idles while it waits for data from system memory. In an effort to bridge this gap, HP and the industry are developing new memory technologies. We work with the Joint Electronic Device Engineering Council (JEDEC), memory vendors, and chipset developers. We evaluate developing memory technologies in terms of price, performance, reliability, and backward compatibility, and then implement the most promising technologies in ProLiant servers. Basic DRAM operation Before a computer can perform any useful task, it must copy applications and data from the disk drive to the system memory. Computers use two types of system memory: • Cache memory, which consists of very fast static RAM (SRAM) integrated with the processor. • Main memory, which consists of DRAM chips on DIMMs packaged in various ways depending on system form factor. Each DRAM chip contains millions of memory locations, or cells, arranged in a matrix of rows and columns (Figure 1). Peripheral circuitry on the DIMM reads, amplifies, and transfers the data from the memory cells to the memory bus. Each DRAM row, called a page, consists of several DRAM cells. Each DRAM cell contains a capacitor capable of storing an electrical charge for a short time. A charged cell represents a "1" data bit, and an uncharged cell represents a "0" data bit. To maintain the validity of the data, the DIMM recharges, or refreshes, the capacitors thousands of times per second. Figure 1. Representation of a single DRAM chip on a DIMM 2

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
Introduction
This paper gives you an overview of the memory technologies that we use in HP ProLiant servers, and
describes how we evaluate these technologies. It also briefly summarizes the evolution of server memory
and explores the different dynamic random access memory (DRAM) technologies.
Processors use system memory to store the operating system, applications, and data they use and
manipulate. As a result, speed and bandwidth of the system memory controls application performance.
Over the years, the need for greater memory bandwidth has driven system memory evolution from
asynchronous DRAM technologies to high-bandwidth synchronous DRAM (SDRAM), and finally to today’s
Double Data Rate (DDR) SDRAM technologies. Our challenge going forward is to continue to increase
system performance by narrowing the performance gap between processors and memory.
The processor-memory performance gap occurs when the processor idles while it waits for data from system
memory. In an effort to bridge this gap, HP and the industry are developing new memory technologies. We
work with the Joint Electronic Device Engineering Council (JEDEC), memory vendors, and chipset
developers. We evaluate developing memory technologies in terms of price, performance, reliability, and
backward compatibility, and then implement the most promising technologies in ProLiant servers.
Basic DRAM operation
Before a computer can perform any useful task, it must copy applications and data from the disk drive to
the system memory. Computers use two types of system memory:
•
Cache memory, which consists of very fast static RAM (SRAM) integrated with the processor.
•
Main memory, which consists of DRAM chips on DIMMs packaged in various ways depending on system
form factor.
Each DRAM chip contains millions of memory locations, or cells, arranged in a matrix of rows and columns
(Figure 1). Peripheral circuitry on the DIMM reads, amplifies, and transfers the data from the memory cells
to the memory bus. Each DRAM row, called a page, consists of several DRAM cells. Each DRAM cell
contains a capacitor capable of storing an electrical charge for a short time. A charged cell represents a
“1” data bit, and an uncharged cell represents a “0” data bit. To maintain the validity of the data, the
DIMM recharges, or refreshes, the capacitors thousands of times per second.
Figure 1
. Representation of a single DRAM chip on a DIMM
2