HP Vectra XU 6/XXX HP Vectra XU 6/xxx, Guide to Optimizing performance - Page 54
Architectural Overview
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2 Technical Reference Architectural Overview Bus architecture Bridges Architectural Overview Your HP Vectra XU PC is based on a three-bus architecture. Each bus connects functional components of your PC which have similar data handling requirements. By using this architecture, your PC is able to distribute its data traffic more effectively. The three buses are: • The (processor's) local bus, which connects the Pentium™ Pro processor with main memory. This bus operates at 60 or 66 MHz (depending on your processor) and is 64-bits wide. The local bus has the highest data handling capacity of any data path in your PC. • The PCI bus, which connects I/O peripherals requiring high data throughput. Your PC's integrated SCSI controller and IDE controller are connected to this bus, as are your video adapter and LAN interface board. The PCI bus operates at either 30 or 33 MHz (depending on your processor) and is 32-bits wide. • The ISA bus, which connects slower I/O peripherals such as your keyboard/mouse controller, flexible disk controller and BIOS ROM. The ISA bus operates at 7.5 or 8.3 MHz (depending on your processor) and provides backwards compatibility with previous generation accessory boards. The three buses are connected together by a series of components called bridges. Each bridge converts data, passing in either direction, to the format required by the destination bus. The bridge devices are highly buffered to accelerate their operation. The block diagram on the facing page illustrates this architecture of your HP Vectra PC in functional components. The descriptions given in the rest of this chapter describe some of these components, with special emphasis on new features and technologies. 48 English