IBM 71413SU Technical Reference - Page 15

DDR2 DDR2 Buffer Buffer DDR2 DDR2 Buffer Buffer DDR2 DDR2 Buffer Buffer DDR2 DDR2 Buffer Buffer B = bytes b = bits CPU 1 CPU 2 CPU 3 CPU 4 Each FSB: 1066 MHz 8.53 GBps IBM X4 Architecture core chipset Memory controller ("Hurricane 4") 8 ports, each: R: 4.26 GBps W: 2.13 GBps Scalability ports 10.24 GBps each HSS-IB 6 GBps HSS-IB 6 GBps 2 GBps South bridge Serial PCI + USB IDE DVD RSA2 + Video 6x USB 2.0 PCI-E x4 Gb Ethernet BCM5709C PCI-E bridge 1 PCI-E bridge 2 1234567 Seven PCI Express x8 slots (slots 6 & 7 are hot-swap) LSI 1078 SAS MR10k External SAS port HDD backplane Figure 7 x3850 M2 and x3950 M2 system block diagram Each memory port out of the memory controller has a peak read throughput of 4.26 GBps and a peak write throughput of 2.13 GBps. DIMMs are installed in matched pairs, two-way interleaving, to ensure the memory port is fully utilized. Peak throughput for each PC2-5300 DDR2 DIMM is 4.26 GBps. Because there are eight memory ports, spreading installed DIMMs across all four memory ports can improve performance. The eight independent memory ports provide simultaneous access to memory. With four memory cards installed, and eight DIMMs in each card, peak read memory bandwidth is 34.1 GBps and peak write bandwidth is 17.1 GBps. The memory controller routes all traffic from the eight memory ports, four microprocessor ports, and the three PCI bridge ports. The memory controller also has embedded DRAM which, in the x3850 M2 and x3950 M2, holds a snoop filter lookup table. This filter ensures that snoop requests for cache lines go to the appropriate microprocessor bus and not all four of them, thereby improving performance. As shown in Figure 7, PCI bridge 1 supplies four of the seven PCI Express x8 slots on four independent PCI Express buses. PCI bridge 2 supplies the other three PCI Express x8 slots plus the onboard SAS devices, including the optional ServeRAID-MR10k. A separate South bridge supplies all the other onboard PCI devices, such as the USB ports, onboard Ethernet and the standard RSA II. IBM System x3950 M2 and x3850 M2 Technical Introduction 15