Intel BOXD845BGSE Product Specification - Page 51

Interrupts

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Technical Reference 2.6 Interrupts The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the Advanced Programmable Interrupt Controller (APIC) portion of the ICH2 component. The PIC is supported in Windows 98 SE and Windows ME and uses the first 16 interrupts. The APIC is supported in Windows 2000 and Windows XP and supports a total of 24 interrupts. Table 16. Interrupts IRQ System Resource NMI I/O channel check 0 Reserved, interval timer 1 Reserved, keyboard buffer full 2 Reserved, cascade interrupt from slave PIC 3 COM2 (Note 1) 4 COM1 (Note 1) 5 LPT2 (Plug and Play option)/User available 6 Diskette drive 7 LPT1 (Note 1) 8 Real-time clock 9 Reserved for ICH2 system management bus 10 User available 11 User available 12 Onboard mouse port (if present, else user available) 13 Reserved, math coprocessor 14 15 16 (Note 2) 17 (Note 2) 18 (Note 2) 19 (Note 2) 20 (Note 2) 21 (Note 2) 22 (Note 2) 23 (Note 2) Primary IDE (if present, else user available) Secondary IDE (if present, else user available) (through PIRQA) AGP video (through PIRQB) AC '97 audio/User available (through PIRQC) OHCI controller 1 (optional) (through PIRQD) ICH2 USB controller 1 (through PIRQE) ICH2 LAN (optional) (through PIRQF) OHCI controller 2 (optional)/User available (through PIRQG) EHCI controller 1 (optional)/User available (through PIRQH) ICH2 USB controller 2/User available Notes: 1. Default, but can be changed to another IRQ. 2. Available in APIC mode only. 51

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Technical Reference
51
2.6 Interrupts
The interrupts can be routed through either the Programmable Interrupt Controller (PIC) or the
Advanced Programmable Interrupt Controller (APIC) portion of the ICH2 component.
The PIC is
supported in Windows 98 SE and Windows ME and uses the first 16 interrupts.
The APIC is
supported in Windows 2000 and Windows XP and supports a total of 24 interrupts.
Table 16.
Interrupts
IRQ
System Resource
NMI
I/O channel check
0
Reserved, interval timer
1
Reserved, keyboard buffer full
2
Reserved, cascade interrupt from slave PIC
3
COM2
(Note 1)
4
COM1
(Note 1)
5
LPT2 (Plug and Play option)/User available
6
Diskette drive
7
LPT1
(Note 1)
8
Real-time clock
9
Reserved for ICH2 system management bus
10
User available
11
User available
12
Onboard mouse port (if present, else user available)
13
Reserved, math coprocessor
14
Primary IDE (if present, else user available)
15
Secondary IDE (if present, else user available)
16
(Note 2)
(through PIRQA) AGP video
17
(Note 2)
(through PIRQB) AC
’
97 audio/User available
18
(Note 2)
(through PIRQC) OHCI controller 1 (optional)
19
(Note 2)
(through PIRQD) ICH2 USB controller 1
20
(Note 2)
(through PIRQE) ICH2 LAN (optional)
21
(Note 2)
(through PIRQF) OHCI controller 2 (optional)/User available
22
(Note 2)
(through PIRQG) EHCI controller 1 (optional)/User available
23
(Note 2)
(through PIRQH) ICH2 USB controller 2/User available
Notes:
1.
Default, but can be changed to another IRQ.
2.
Available in APIC mode only.