Intel BX80532PG3200D Data Sheet

Intel BX80532PG3200D Manual

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  • Intel BX80532PG3200D | Data Sheet - Page 1
    Intel® Pentium® Processor on 45-nm Process Datasheet For Platforms Based on Mobile Intel® 4 Series Express Chipset Family October 2009 Document Number: 322875-001EN
  • Intel BX80532PG3200D | Data Sheet - Page 2
    or instructions marked "reserved" or "undefined." Intel Processor Spec Finder at http:// processorfinder.intel.com or contact your Intel representative for more information. Enabling Execute Disable Bit functionality requires a PC with a processor with Execute Disable Bit capability and a supporting
  • Intel BX80532PG3200D | Data Sheet - Page 3
    69 5.1.2 Intel® Thermal Monitor Processors 30 4 1-MB die Micro-FCPGA Processor Package Drawing (Sheet 1 of 2 34 5 1-MB Die Micro-FCPGA Processor Package Drawing (Sheet 2 of 2 35 6 Processor Pinout (Top Package View, Left Side 36 7 Processor Pinout (Top Package View, Right Side 37 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 4
    4 FSB Pin Groups ...26 5 Processor Absolute Maximum Ratings 27 6 Voltage and Current Specifications for the Pentium Processors 29 7 AGTL+ Signal Group DC 59 13 Power Specifications for the Pentium Processors 68 14 Thermal Diode Interface 69 15 Thermal Diode Parameters Using Transistor Model
  • Intel BX80532PG3200D | Data Sheet - Page 5
    Revision History Document Revision Number Number 322875 -001 Initial Draft Description § Date October 2009 Datasheet 5
  • Intel BX80532PG3200D | Data Sheet - Page 6
    6 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 7
    is referred as the GMCH. Key features include: • Dual-core processor for mobile with enhanced performance • Supports Intel architecture with Intel® Wide Dynamic Execution • Supports L1 cache-to-cache (C2C) transfer • On-die, primary 32-KB instruction cache and 32-KB, write-back data cache in each
  • Intel BX80532PG3200D | Data Sheet - Page 8
    IA-32 Architectures Software Developer's Manuals for more detailed information. 64-bit memory extensions to the IA-32 architecture. Half ratio support (N/2) for Core to Bus ratio TDP VCC VSS Intel Core 2 Duo processors and Intel Core 2 Extreme processors support the N/2 feature that allows having
  • Intel BX80532PG3200D | Data Sheet - Page 9
    Hub 9M (ICH9M) Datasheet Intel® I/O Controller Hub 9 (ICH9)/ I/O Controller Hub 9M (ICH9M) Specification Update Intel® 64 and IA-32 Architectures Software Developer's Manuals Volume 1: Basic Architecture Volume 2A: Instruction Set Reference, A-M Volume 2B: Instruction Set Reference, N-Z Volume
  • Intel BX80532PG3200D | Data Sheet - Page 10
    Introduction 10 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 11
    States The processor supports low-power processor implements two software interfaces for requesting low-power states: MWAIT instruction inside the processor and do not directly result in I/O reads on the processor FSB. return to the C0 state and the processor should return to the Normal state. Figure
  • Intel BX80532PG3200D | Data Sheet - Page 12
    # de-asserted STPCLK# STPCLK# de-asserted STPCLK# asserted de-asserted STPCLK# asserted Core state break HLT instruction C1/Auto Halt MWAIT(C1) Halt break C0 P_LVL2 or MWAIT(C2) Core state break Core P_LVL3 or and de-assertion have no effect if a core is in C2 or C3. 12 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 13
    Normal state or the AutoHALT Powerdown state. See the Intel® 64 and IA-32 Architectures Software Developer's Manuals, Volume 3A/3B: System Programmer's Guide for more information. The system can generate a STPCLK# while the processor is in the AutoHALT Powerdown state. When the system deasserts
  • Intel BX80532PG3200D | Data Sheet - Page 14
    the AutoHALT state except that Monitor events can cause the processor core to return to the C0 state. See the Intel® 64 and IA-32 Architectures Software Developer's Manuals, Volume 2A: Instruction Set Reference, A-M and Volume 2B: Instruction Set Reference, N-Z, for more information. Core C2 State
  • Intel BX80532PG3200D | Data Sheet - Page 15
    of SLP# as per AC Specification T75. While in Stop-Grant state, the processor will service snoops and latch interrupts delivered on the FSB. The processor will latch SMI#, INIT# and LINT[1:0] interrupts and will service only one of each upon return to the Normal state. The PBE# signal may
  • Intel BX80532PG3200D | Data Sheet - Page 16
    (to allow for PLL stabilization) must occur before the processor can be considered to be in the Sleep state. Once While in Deep Sleep state, the processor is incapable of responding to snoop transactions or latching FSB while the processor is in Deep Sleep state. When the processor is in Deep Sleep
  • Intel BX80532PG3200D | Data Sheet - Page 17
    of the two frequencies and voltages as the resolved request and transition to that frequency and voltage. The processor also supports Dynamic FSB Frequency Switching and Intel Dynamic Acceleration Technology mode on select SKUs. The operating system can take advantage of these features and request
  • Intel BX80532PG3200D | Data Sheet - Page 18
    state, control will be returned to software while an Enhanced Intel SpeedStep Technology transition up to the initial operating point occurs. enabled. The processor implements two software interfaces for requesting enhanced package low-power states: MWAIT instruction extensions with sub 18 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 19
    different from the algorithm used in previous mobile processors. PSI-2 functionality is expanded further to support three processor states: • Both cores are in idle state mode when the processor is idle and fused leakage limit is less than or equal to the BIOS threshold value. § Datasheet 19
  • Intel BX80532PG3200D | Data Sheet - Page 20
    Low Power Features 20 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 21
    core frequency of the processor. As in previous-generation processors, the processor core frequency is a multiple of the BCLK[1:0] frequency. The processor bus ratio multiplier will be set at its default ratio at manufacturing. The processor uses a differential clocking implementation. Datasheet 21
  • Intel BX80532PG3200D | Data Sheet - Page 22
    processor uses seven voltage identification pins,VID[6:0], to support automatic selection of power supply voltages. The VID pins for the processor are CMOS outputs driven by the processor 1750 1.1625 1.1500 1.1375 1.1250 1.1125 1.1000 1.0875 1.0750 1.0625 1.0500 1.0375 1.0250 1.0125 22 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 23
    0.7250 0.7125 0.7000 0.6875 0.6750 0.6625 0.6500 0.6375 0.6250 0.6125 0.6000 0.5875 0.5750 0.5625 0.5500 0.5375 0.5250 0.5125 0.5000 0.4875 0.4750 0.4625 0.4500 0.4375 0.4250 Datasheet 23
  • Intel BX80532PG3200D | Data Sheet - Page 24
    0.2000 0.1875 0.1750 0.1625 0.1500 0.1375 0.1250 0.1125 0.1000 0.0875 0.0750 0.0625 0.0500 0.0375 0.0250 0.0125 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 0.0000 24 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 25
    processor supports the THERMTRIP# signal for catastrophic thermal protection. An external thermal sensor should also be used to protect the processor L L H RESERVED L H H RESERVED L H L 200 MHz H H L RESERVED H H H RESERVED H L H RESERVED H L L RESERVED Datasheet 25
  • Intel BX80532PG3200D | Data Sheet - Page 26
    # Synchronous to TCK TDO Clock BCLK[1:0] COMP[3:0], DBR#2, GTLREF, RSVD, TEST2, TEST1, THERMDA, THERMDC, VCC, VCCA, VCCP, VCC_SENSE, VSS, VSS_SENSE NOTES:See next page 26 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 27
    requirements. 2. In processor systems where there is no debug port implemented on the system board, these signals are used to support a debug port NOTES: 1. For functional operation, all processor electrical, signal quality, mechanical and thermal specifications must be satisfied. Datasheet 27
  • Intel BX80532PG3200D | Data Sheet - Page 28
    processor case temperature specifications. 4. This rating applies to the processor processor. 6. For Intel® Pentium® processors in 22x22 mm package. Processor DC Specifications The processor DC specifications in this section are defined at the processor frequencies supported on the processor.
  • Intel BX80532PG3200D | Data Sheet - Page 29
    ICC Sleep HFM LFM ICC Deep Sleep HFM LFM VCC Power Supply Current Slew Rate at Processor Package Pin ICC for VCCA Supply ICCC for VCCP Supply before VCC Stable ICC for VCCP .5 600 130 4.5 2.5 A mA/µs mA A A NOTES:See next page. Notes 1, 2 1, 2 2, 6 10 3, 4 3, 4 3, 4 3, 4 5, 7 8 9 Datasheet 29
  • Intel BX80532PG3200D | Data Sheet - Page 30
    by the processor during a power management event (Intel Thermal Monitor 2, Enhanced Intel SpeedStep Technology threshold should be high enough to support current levels described herein. Figure 3. Active VCC and ICC Loadline for Pentium Processors VCC-CORE [V] VCC-CORE 0.75000V 30 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 31
    + output driver. Measured at 0.31*VCCP. RTT is connected to VCCP on die. Refer to processor I/O buffer models for I/V characteristics. 8. Specified with on-die RTT and RON turned off. Vin BR0#, DBSY#, DRDY#, HIT#, HITM#, LOCK#, PRDY#, DPWR#, DSTB[1:0]#, DSTBP[3:0] and DSTBN[3:0]#. Datasheet 31
  • Intel BX80532PG3200D | Data Sheet - Page 32
    Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. The VCCP referred to in these specifications refers to Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. Measured at 0.2 V. 3. VOH is determined by
  • Intel BX80532PG3200D | Data Sheet - Page 33
    4.1 Package Mechanical Specifications The processor is available in 478-pin Micro normal to the surface of the processor. This protects the processor die from fracture risk due to uneven specifically to load one type of processor. Moreover, the processor package substrate should not be used
  • Intel BX80532PG3200D | Data Sheet - Page 34
    and Pin Information Figure 4. 1-MB die Micro-FCPGA Processor Package Drawing (Sheet 1 of 2) 34 THIS DRAWING CONTAINS INTEL CORPORATION CONFIDENTIAL INFORMATION. IT IS DISCLOSED IN CONFIDENCE AND 255 0.355 W 6g Keying Pins COMMENTS ø0.356 M C A B ø0.254 M C A1, A2 B6739-01 D76564(1) Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 35
    Package Mechanical Specifications and Pin Information Figure 5. 1-MB Die Micro-FCPGA Processor Package Drawing (Sheet 2 of 2) Datasheet THIS DRAWING CONTAINS INTEL CORPORATION CONFIDENTIAL INFORMATION. IT IS DISCLOSED IN CONFIDENCE AND ITS CONTENTS MAY NOT BE DISCLOSED, REPRODUCED, DISPLAYED OR
  • Intel BX80532PG3200D | Data Sheet - Page 36
    . Table 10 provides the pin list, arranged numerically by pin number. For signal descriptions, refer to Section 4.3. Figure 6. Processor Pinout (Top Package View, Left Side) 1 A1 B1 2 VSS RSVD C RESET# VSS D VSS RSVD E DBSY for Micro-FCBGA, A1 is de-populated and B1 is VSS. 36 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 37
    Package Mechanical Specifications and Pin Information Figure 7. Processor Pinout (Top Package View, Right Side) 14 15 A VSS VCC B D[35]# V VSS W DSTBN[ 2]# Y DSTBP[ A 2]# A D[47]# VSS A B D[57]# VSS D[53]# A C GTLREF A D DSTBN[3] # VSS A E VSS 25 TEST4 A F 26 Datasheet 37
  • Intel BX80532PG3200D | Data Sheet - Page 38
    Source Synch Input/ Output W6 Source Synch Input/ Output U4 Source Synch Input/ Output Y5 Source Input/ Synch Output U1 Source Input/ Synch Output 38 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 39
    / Output Bus Clock Input Bus Clock Input Common Input/ Clock Output Common Input/ Clock Output Common Clock Output Common Clock Output Common Input/ Clock Output Datasheet 39
  • Intel BX80532PG3200D | Data Sheet - Page 40
    Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output 40 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 41
    / Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Datasheet 41
  • Intel BX80532PG3200D | Data Sheet - Page 42
    Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output 42 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 43
    Output Input Input Input Input Input/ Output Output Input Input/ Output Output Input Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input Input Datasheet 43
  • Intel BX80532PG3200D | Data Sheet - Page 44
    Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other 44 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 45
    / Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Datasheet 45
  • Intel BX80532PG3200D | Data Sheet - Page 46
    Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other 46 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 47
    / Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Datasheet 47
  • Intel BX80532PG3200D | Data Sheet - Page 48
    Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other 48 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 49
    / Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Datasheet 49
  • Intel BX80532PG3200D | Data Sheet - Page 50
    Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other Power/ Other 50 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 51
    CMOS Power/Other Power/other Power/Other Power/Other Power/Other Power/Other Input Output Input Input Input Input/ Output Input/ Output Input/ Output Input Datasheet 51
  • Intel BX80532PG3200D | Data Sheet - Page 52
    Power/Other Input/ Output Input/ Output Input/ Output Input Output Input/ Output Input Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Output 52 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 53
    Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Input/ Output Input/ Output Input/ Output Input/ Output Output Output Output Datasheet 53
  • Intel BX80532PG3200D | Data Sheet - Page 54
    Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Open Drain Output Output Input Input Input Output 54 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 55
    Synch Power/Other Source Synch Input Input Input/ Output Input/ Output Input/ Output Input/ Output Input Input Input Input/ Output Input/ Output Input/ Output 55 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 56
    / Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Datasheet 56
  • Intel BX80532PG3200D | Data Sheet - Page 57
    VSS Power/Other U1 A[23]# Source Synch Input/ Output U2 A[30]# Source Synch Input/ Output U3 VSS Power/Other U4 A[21]# Source Synch Input/ Output Datasheet 57
  • Intel BX80532PG3200D | Data Sheet - Page 58
    Y26 DSTBN[2] # Source Synch Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output Input/ Output 58 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 59
    (Address) define a 236-byte physical memory address space. In sub-phase 1 processor's address wrap-around at the 1-MB boundary. Assertion of A20M# is only supported in real mode. A20M# is an asynchronous signal. However, to ensure recognition of this signal following an input/output write instruction
  • Intel BX80532PG3200D | Data Sheet - Page 60
    processor to request the bus. The arbitration is done between the processor (Symmetric Agent) and GMCH (High Priority Agent). BSEL[2:0] (Bus Select) are used to select the processor processor is used only in processor systems where no debug . DBR# is not a processor signal. DBSY# (Data Bus
  • Intel BX80532PG3200D | Data Sheet - Page 61
    of DEFER# is normally the responsibility of the addressed memory or input/ output agent. This signal must connect driven by the ICH9M. DPSLP# when asserted on the platform causes the processor to transition from the Sleep State to the Deep Sleep state. To DSTBN[1]# DSTBN[2]# DSTBN[3]# Datasheet 61
  • Intel BX80532PG3200D | Data Sheet - Page 62
    event functionality, including identification of support of the feature and enable/disable information, refer to Volumes 3A and 3B of the Intel® 64 and IA-32 Architectures Software Developer's Manuals and the Intel® Processor Identification and CPUID Instruction application note. GTLREF determines
  • Intel BX80532PG3200D | Data Sheet - Page 63
    processor continues to handle snoop requests during INIT# assertion. INIT# is an asynchronous signal. However, to ensure recognition of this signal following an input/output write instruction processor. The processor Processor Power Status Indicator signal. This signal is asserted when the processor
  • Intel BX80532PG3200D | Data Sheet - Page 64
    processor input. The processor processor processor processor processor to enter the Sleep state. During Sleep state, the processor Processors in this state will not recognize snoops or interrupts. The processor processor core units. If DPSLP# is asserted while in the Sleep state, the processor processor
  • Intel BX80532PG3200D | Data Sheet - Page 65
    TDO (Test Data Out) transfers serial test data out of the processor. TDO provides the serial output needed for JTAG specification support. Input Refer to the appropriate platform design guide for further TEST1, TEST2, TEST3, TEST4, TEST5, TEST6 and TEST7 termination requirements and implementation
  • Intel BX80532PG3200D | Data Sheet - Page 66
    at the processor die. support automatic selection of power supply voltages (VCC). Unlike some previous generations of processors, these are CMOS signals that are driven by the processor are needed to support the processor voltage specification processor die. It should be used to sense
  • Intel BX80532PG3200D | Data Sheet - Page 67
    -term reliability of Intel processor-based systems, the system/processor thermal solution should be designed so the processor remains within the minimum processor outside these operating limits may result in permanent damage to the processor and potentially other components in the system. Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 68
    . The Intel Thermal Monitor's automatic mode is used to indicate that the maximum TJ has been reached. 4. The Intel Thermal Monitor automatic mode must be enabled for the processor to operate within specifications. 5. At Tj of 105 oC 6. At Tj of 50 oC 7. At Tj of 35 oC 68 Datasheet
  • Intel BX80532PG3200D | Data Sheet - Page 69
    constants in this relationship is processor specific, and is known as processor, however, is built on Intel's advanced 45-nm processor technology. Due to this new processor Intel Thermal Monitor reading may be characterized using the Intel value programmed into the processor Model-Specific Register (
  • Intel BX80532PG3200D | Data Sheet - Page 70
    NOTES: 1. Intel does not support or recommend processor silicon reaches its maximum operating temperature. The temperature at which the Intel Thermal Monitor activates the TCC is not user configurable. Bus traffic is snooped in the normal manner and interrupt requests are latched (and serviced
  • Intel BX80532PG3200D | Data Sheet - Page 71
    handling routines. Processor performance will be supported by the processor. The Intel Thermal Monitor automatic mode and Enhanced Multi-Threaded Thermal Monitoring must be enabled through BIOS for the processor to be operating within specifications. Intel processor hot) is asserted when the processor
  • Intel BX80532PG3200D | Data Sheet - Page 72
    processor exits the low-power state and the processor the processor will be processor Intel Thermal Monitor feature must be enabled for the processor to remain within specification. Digital Thermal Sensor The processor supported operating temperature of the processor maximum processor core processor
  • Intel BX80532PG3200D | Data Sheet - Page 73
    processor hot), is asserted when the processor The processor can Intel® 64 and IA-32 Architectures Software Developer's Manuals for specific register and programming details. The processor note that Intel recommends both enabled, then the processor will still apply only reduced processor power processor
  • Intel BX80532PG3200D | Data Sheet - Page 74
    under-designed thermal solution that is not able to prevent excessive assertion of PROCHOT# in the anticipated ambient environment may cause a noticeable performance loss. § 74 Datasheet
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Document Number: 322875-001EN
Intel® Pentium® Processor on
45-nm Process
Datasheet
For Platforms Based on Mobile Intel® 4 Series Express Chipset Family
October 2009