Intel D525MW Product Specification - Page 69

Intel D525MW Manual

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Board Status and Error Messages 4.4 Port 80h POST Codes During the POST, the BIOS generates diagnostic progress codes (POST codes) to I/O port 80h. If the POST fails, execution stops and the last POST code generated is left at port 80h. This code is useful for determining the point where an error occurred. Displaying the POST codes requires a PCI bus add-in card, often called a POST card. The POST card can decode the port and display the contents on a medium such as a seven-segment display. NOTE The POST card must be installed in the PCI bus connector. The following tables provide information about the POST codes generated by the BIOS Table 40 lists the Port 80h POST code ranges Table 41 lists the Port 80h POST codes themselves Table 42 lists the Port 80h POST sequence NOTE In the tables listed above, all POST codes and range values are listed in hexadecimal. Table 40. Port 80h POST Code Ranges Range 00 - 0F 10 - 1F 20 - 2F 30 - 3F 40 - 4F 50 - 5F 60 - 6F 70 - 7F 80 - 8F 90 - 9F A0 - AF B0 - BF C0 - CF D0 - DF E0 - FF Category/Subsystem Debug codes: Can be used by any PEIM/driver for debug. Host Processors: 1F is an unrecoverable CPU error. Memory/Chipset: 2F is no memory detected or no useful memory detected. Recovery: 3F indicated recovery failure. Reserved for future use. I/O Busses: PCI, USB, ISA, ATA, etc. 5F is an unrecoverable error. Start with PCI. Reserved for future use (for new busses). Output Devices: All output consoles. 7F is an unrecoverable error. Reserved for future use (new output console codes). Input devices: Keyboard/Mouse. 9F is an unrecoverable error. Reserved for future use (new input console codes). Boot Devices: Includes fixed media and removable media. BF is an unrecoverable error. Reserved for future use. Boot device selection. E0 - EE: Miscellaneous codes. See Table 41. EF: boot/S3 resume failure. F0 - FF: FF processor exception. 69

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Board Status and Error Messages
69
4.4
Port 80h POST Codes
During the POST, the BIOS generates diagnostic progress codes (POST codes) to I/O
port 80h.
If the POST fails, execution stops and the last POST code generated is left
at port 80h.
This code is useful for determining the point where an error occurred.
Displaying the POST codes requires a PCI bus add-in card, often called a POST card.
The POST card can decode the port and display the contents on a medium such as a
seven-segment display.
NOTE
The POST card must be installed in the PCI bus connector.
The following tables provide information about the POST codes generated by the
BIOS:
•
Table 40 lists the Port 80h POST code ranges
•
Table 41 lists the Port 80h POST codes themselves
•
Table 42 lists the Port 80h POST sequence
NOTE
In the tables listed above, all POST codes and range values are listed in hexadecimal.
Table 40.
Port 80h POST Code Ranges
Range
Category/Subsystem
00 – 0F
Debug codes:
Can be used by any PEIM/driver for debug.
10 – 1F
Host Processors:
1F is an unrecoverable CPU error.
20 – 2F
Memory/Chipset:
2F is no memory detected or no useful memory detected.
30 – 3F
Recovery:
3F indicated recovery failure.
40 – 4F
Reserved for future use.
50 – 5F
I/O Busses:
PCI, USB, ISA, ATA, etc.
5F is an unrecoverable error.
Start with PCI.
60 – 6F
Reserved for future use (for new busses).
70 – 7F
Output Devices:
All output consoles. 7F is an unrecoverable error.
80 – 8F
Reserved for future use (new output console codes).
90 – 9F
Input devices:
Keyboard/Mouse.
9F is an unrecoverable error.
A0 – AF
Reserved for future use (new input console codes).
B0 – BF
Boot Devices:
Includes fixed media and removable media.
BF is an unrecoverable error.
C0 – CF
Reserved for future use.
D0 – DF
Boot device selection.
E0 – FF
E0 – EE:
Miscellaneous codes. See Table 41.
EF:
boot/S3 resume failure.
F0 – FF:
FF processor exception.