Intel D865GSA Intel Desktop Board D865GSA Product Guide English - Page 31

Installing and Removing Memory - specs

Page 31 highlights

Installing and Replacing Desktop Board Components Installing and Removing Memory NOTE To be fully compliant with all applicable Intel SDRAM memory specifications, the board requires DIMMs that support the Serial Presence Detect (SPD) data structure. You can access the PC Serial Presence Detect Specification at: http://www.intel.com/technology/memory/ddr/specs/dda18c32_64_128x72ag_a.pdf The desktop board has two 184-pin DDR DIMM sockets providing Channel A and Channel B. For dual-channel performance, install a matched pair of DIMMs equal in speed and size (see Figure 13). Channel A, DIMM 0 Channel B, DIMM 0 1 GB, 400 MHz 1 GB, 400 MHz Figure 13. Dual Channel Memory Configuration Example OM19175 NOTE All other memory configurations will result in single channel memory operation. 31

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64

Installing and Replacing Desktop Board Components
31
Installing and Removing Memory
NOTE
To be fully compliant with all applicable Intel SDRAM memory specifications, the board requires
DIMMs that support the Serial Presence Detect (SPD) data structure.
You can access the PC
Serial Presence Detect Specification at:
The desktop board has two 184-pin DDR DIMM sockets providing Channel A and Channel B.
For
dual-channel performance, install a matched pair of DIMMs equal in speed and size (see
Figure 13).
OM19175
Channel A, DIMM 0
Channel B, DIMM 0
1 GB, 400 MHz
1 GB, 400 MHz
Figure 13.
Dual Channel Memory Configuration Example
NOTE
All other memory configurations will result in single channel memory operation.