Intel DZ68ZV Technical Product Specification - Page 19

Memory Configurations

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Product Description 1.5.1 Memory Configurations The Intel Core i7, Intel Core i5, and Intel Core i3 processors support the following types of memory organization: • Dual channel (Interleaved) mode. This mode offers the highest throughput for real world applications. Dual channel mode is enabled when the installed memory capacities of both DIMM channels are equal. Technology and device width can vary from one channel to the other but the installed memory capacity for each channel must be equal. If different speed DIMMs are used between channels, the slowest memory timing will be used. • Single channel (Asymmetric) mode. This mode is equivalent to single channel bandwidth operation for real world applications. This mode is used when only a single DIMM is installed or the memory capacities are unequal. Technology and device width can vary from one channel to the other. If different speed DIMMs are used between channels, the slowest memory timing will be used. For information about... Memory Configuration Examples Refer to: http://www.intel.com/support/motherboards/desktop/sb/cs011965.htm 19

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Product Description
19
1.5.1
Memory Configurations
The Intel Core i7, Intel Core i5, and Intel Core i3 processors support the following
types of memory organization:
•
Dual channel (Interleaved) mode
.
This mode offers the highest throughput for
real world applications.
Dual channel mode is enabled when the installed memory
capacities of both DIMM channels are equal.
Technology and device width can vary
from one channel to the other but the installed memory capacity for each channel
must be equal.
If different speed DIMMs are used between channels, the slowest
memory timing will be used.
•
Single channel (Asymmetric) mode
.
This mode is equivalent to single channel
bandwidth operation for real world applications.
This mode is used when only a
single DIMM is installed or the memory capacities are unequal.
Technology and
device width can vary from one channel to the other.
If different speed DIMMs are
used between channels, the slowest memory timing will be used.
For information about…
Refer to:
Memory Configuration Examples
011965.htm