Intel SC5650 Technical Product Specification - Page 63

Intel® Server Chassis SC5650 TPS Power Sub-system once it is installed in the system: Address2, Address1, and Address0. For non-redundant systems the power supply device address location should be B0h. System addressing Address2/Address1/ Address0 0/0/0 0/0/1 0/1/0 0/1/1 1/0/0 1/0/1 1/1/0 1/1/1 PMBus device read addresses 2 B0h/B1h1 B2h/B3h B4h/B5h B6h/B7h B8h/B9h BAh/BBh BCh/BDh BEh/BFh 1 Non-redundant power supplies use the 0/0/0 address location 2 The addressing method uses the 7 MSB bits to set the address and the LSB to define whether a device is reading or writing. The addresses defined above use 8 bits including the read/write bit. IPMI FRU Addressing: If the power supply has a FRU (field replaceable unit) serial EEPROM; it should be located at the following addresses. System addressing Address2/Address1/ Address0 0/0/0 0/0/1 0/1/0 0/1/1 1/0/0 1/0/1 1/1/0 1/1/1 FRU device addresses 2 A0h/A1h 1 A2h/A3h A4hA5h A6h/A7h A8h/A9h AAh/ABh ACh/ADh AEh/AFh 1 Non-redundant power supplies use the 0/0/0 address location. 2 The addressing method uses the 7 MSB bits to set the address and the LSB to define whether a device is reading or writing. The addresses defined above use 8 bits including the read/write bit. 2.3 600-W Power Distribution Board (PDB) This specification defines the 570-W cage for the ERP12V 600-W 1+1 redundant power supply and for the ERP 12V 600-W 2+0 non-redundant power supply. The cage is designed to plug directly to the output connector of the power supply and contains three DC/DC power converters to produce other required voltages: +3.3VDC, +5VDC, and -12VDC along with additional 12V rail 240VA protection and a FRU EEPROM. Revision 1.2 49 Intel order number E39531-004