Intel SE7520JR2ATAD2 Product Specification - Page 170

Error Reporting and Handling Intel® Server Board SE7520JR2 Checkpoint 8C 8D 8E 90 A0 A1 A2 A4 A7 A8 A9 AA AB AC B1 00 Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB A G OFF OFF A G OFF G A G G OFF R OFF OFF R R OFF R OFF R OFF R G R OFF A OFF R R A A A A A R OFF G R G A OFF R OFF R OFF A OFF G OFF OFF A R R OFF OFF G OFF G OFF G OFF A OFF Description Late POST initialization of chipset registers. Build ACPI tables (if ACPI is supported) Program the peripheral parameters. Enable/Disable NMI as selected Late POST initialization of system management interrupt. Check boot password if installed. Clean-up work needed before booting to operating system. Takes care of runtime image preparation for different BIOS modules. Fill the free area in F000h segment with 0FFh. Initializes the Microsoft IRQ Routing Table. Prepares the runtime language module. Disables the system configuration display if needed. Initialize runtime language module. Displays the system configuration screen if enabled. Initialize the CPU's before boot, which includes the programming of the MTRR's. Prepare CPU for operating system boot including final MTRR values. Wait for user input at config display if needed. Uninstall POST INT1Ch vector and INT09h vector. Deinitializes the ADM module. Prepare BBS for Int 19 boot. End of POST initialization of chipset registers. Save system context for ACPI. Passes control to OS Loader (typically INT19h). 6.5.4 Bootblock Initialization Code Checkpoints The Bootblock initialization code sets up the chipset, memory and other components before system memory is available. The following table describes the type of checkpoints that may occur during the bootblock initialization portion of the BIOS: Table 76: Bootblock Initialization Code Checkpoints Checkpoint Before D1 D1 D0 D2 D3 Diagnostic LED Decoder G=Green, R=Red, A=Amber MSB LSB R R OFF A R R OFF R R R G R R R G A Description Early chipset initialization is done. Early super I/O initialization is done including RTC and keyboard controller. NMI is disabled. Perform keyboard controller BAT test. Check if waking up from power management suspend state. Save power-on CPUID value in scratch CMOS. Go to flat mode with 4GB limit and GA20 enabled. Verify the bootblock checksum. Disable CACHE before memory detection. Execute full memory sizing module. Verify that flat mode is enabled. If memory sizing module not executed, start memory refresh and do memory sizing in Bootblock code. Do additional chipset initialization. Re-enable CACHE. Verify that flat mode is enabled. 170 Revision 1.0 C78844-002