MSI H61M User Guide - Page 26

EEpROM on The DRAM module. SeTTing To [AuTo] enables DRAM Timings and

Page 26 highlights

EIST The Enhanced Intel SpeedStep technology allows you to set the performance level of the microprocessor whether the computer is running on battery or AC power. This field will appear after you installed the CPU which supports speedstep technology. Intel Turbo Boost This item will appear when you install a CPU with Intel Turbo Boost technology. This item is used to enable/ disable Intel Turbo Boost technology. It can scale processor frequency higher dynamically when applications demand more performance and TDP headroom exists. It also can deliver seamless power scalability (Dynamically scale up, Speed-Step Down). OC Genie This field is used to enable/ disable OC Genie function. DRAM Frequency This is used to adjust the memory frequency. Adjusted DRAM Frequency It shows the adjusted DRAM frequency. Read-only. Extreme Memory Profile (X.M.P) This item is used to enable/disable the Intel Extreme Memory Profile (XMP). For further information please refer to Intel's official website. DRAM Timing Mode Select whether DRAM timing is controlled by the SPD (Serial Presence Detect) EEPROM on the DRAM module. Setting to [Auto] enables DRAM timings and the following "Advanced DRAM Configuration" sub-menu to be determined by BIOS based on the configurations on the SPD. Selecting [Manual] allows users to configure the DRAM timings and the following related "Advanced DRAM Configuration" sub-menu manually. Advanced DRAM Configuration Press to enter the sub-menu. In this sub-menu you can adjust the advanced DRAM timing. Command Rate This setting controls the DRAM command rate. tCL This controls the CAS latency, which determines the timing delay (in clock cycles) before SDRAM starts a read command after receiving it. tRCD When DRAM is refreshed, both rows and columns are addressed separately. This setup item allows you to determine the timing of the transition from RAS (row address strobe) to CAS (column address strobe). The less the clock cycles, the faster the DRAM performance. 26

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26
EISt
the Enhanced InTel SPeedSTeP TechnologY allows You To seT The Performance
level of The microProcessor wheTher The comPuTer is running on baTTerY or AC
Power. this field will aPPear afTer You insTalled The CpU which suPPorTs sPeedsTeP
TechnologY.
InTel turbo BoosT
this iTem will aPPear when You insTall a CpU wiTh InTel turbo BoosT TechnologY.
this iTem is used To enable/ disable InTel turbo BoosT TechnologY. IT can scale
Processor frequencY higher dYnamicallY when aPPlicaTions demand more Perfor-
mance and tDp headroom exisTs. IT also can deliver seamless Power scalabiliTY
(DYnamicallY scale uP, SPeed-STeP Down).
OC Genie
this field is used To enable/ disable OC Genie funcTion.
DRAM FrequencY
this is used To adjusT The memorY frequencY.
AdjusTed DRAM FrequencY
IT shows The adjusTed DRAM frequencY. Read-onlY.
ExTreme MemorY profile (X.M.p)
this iTem is used To enable/disable The InTel ExTreme MemorY profile (XMp). For
furTher informaTion Please refer To InTel’s official websiTe.
DRAM timing Mode
SelecT wheTher DRAM Timing is conTrolled bY The SpD (Serial presence DeTecT)
EEpROM on The DRAM module. SeTTing To [AuTo] enables DRAM Timings and The
following “Advanced DRAM ConfiguraTion” sub-menu To be deTermined bY BIOS
based on The configuraTions on The SpD. SelecTing [Manual] allows users To con-
figure The DRAM Timings and The following relaTed “Advanced DRAM Configura-
Tion” sub-menu manuallY.
Advanced DRAM ConfiguraTion
press <EnTer> To enTer The sub-menu. In This sub-menu You can adjusT The ad-
vanced DRAM Timing.
Command RaTe
this seTTing conTrols The DRAM command raTe.
TCL
this conTrols The CAS laTencY, which deTermines The Timing delaY (in clock
cYcles) before SDRAM sTarTs a read command afTer receiving iT.
TRCD
When DRAM is refreshed, boTh rows and columns are addressed seParaTelY.
this seTuP iTem allows You To deTermine The Timing of The TransiTion from RAS
(row address sTrobe) To CAS (column address sTrobe). the less The clock cY-
cles, The fasTer The DRAM Performance.