MSI H61M User Guide - Page 27

this iTem is used To seT The TWCL WriTe CAS LaTencY Timing., Gt OverClocking

Page 27 highlights

MS-7788 tRP This setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refreshing may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. tRAS This setting determines the time RAS takes to read from and write to memory cell. tRFC This setting determines the time RFC takes to read from and write to a memory cell. tWR Minimum time interval between end of write data burst and the start of a precharge command. Allows sense amplifiers to restore data to cells. tWTR Minimum time interval between the end of write data burst and the start of a column-read command. It allows I/O gating to overdrive sense amplifiers before read command starts. tRRD Specifies the active-to-active delay of different banks. tRTP Time interval between a read and a precharge command. tFAW This item is used to set the tFAW (four activate window delay) timing. tWCL This item is used to set the tWCL (Write CAS Latency) timing. tCKE This item is used to set the Pulse Width for DRAM module. tRTL This item is used to set Round Trip Latency settings. Advanced Channel 1/ 2 Timing Configuration Press to enter the sub-menu. And you can set the advanced memory timing for each channel. GT OverClocking This item allows you to enable/ disable the overclocking of integrated graphics. GT Ratio This setting controls the ratio of integrated graphics frequency to enable the integrated graphics to run at different frequency combinations. 27

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27
MS-7788
TRp
this seTTing conTrols The number of cYcles for Row Address STrobe (RAS) To be
allowed To Precharge. If insufficienT Time is allowed for The RAS To accumulaTe
iTs charge before DRAM refresh, refreshing maY be incomPleTe and DRAM maY
fail To reTain daTa. this iTem aPPlies onlY when sYnchronous DRAM is insTalled
in The sYsTem.
TRAS
this seTTing deTermines The Time RAS Takes To read from and wriTe To memorY
cell.
TRFC
this seTTing deTermines The Time RFC Takes To read from and wriTe To a memorY
cell.
TWR
Minimum Time inTerval beTween end of wriTe daTa bursT and The sTarT of a Pre-
charge command. Allows sense amPlifiers To resTore daTa To cells.
TWtR
Minimum Time inTerval beTween The end of wriTe daTa bursT and The sTarT of a
column-read command. IT allows I/O gaTing To overdrive sense amPlifiers before
read command sTarTs.
TRRD
SPecifies The acTive-To-acTive delaY of differenT banks.
TRtp
time inTerval beTween a read and a Precharge command.
TFAW
this iTem is used To seT The TFAW (four acTivaTe window delaY) Timing.
TWCL
this iTem is used To seT The TWCL (WriTe CAS LaTencY) Timing.
TCKE
this iTem is used To seT The pulse WidTh for DRAM module.
TRtL
this iTem is used To seT Round triP LaTencY seTTings.
Advanced Channel ±/ 2 timing ConfiguraTion
press <EnTer> To enTer The sub-menu. And You can seT The advanced memorY
Timing for each channel.
Gt OverClocking
this iTem allows You To enable/ disable The overclocking of inTegraTed graPhics.
Gt RaTio
this seTTing conTrols The raTio of inTegraTed graPhics frequencY To enable The inTe-
graTed graPhics To run aT differenT frequencY combinaTions.