Toshiba MW30G71 Service Manual - Page 104

A 8 FROM/TO ANALOG/DIGITAL CONVERTER 7 ADC_Y0 ADC_Y1 ADC_Y2 ADC_Y3 ADC_Y4 ADC_Y5 ADC_Y6 ADC_Y7 ADC_U[CB]0 ADC_U[CB]1 ADC_U[CB]2 ADC_U[CB]3 ADC_U[CB]4 ADC_U[CB]5 ADC_U[CB]6 ADC_U[CB]7 ADC_V[CR]0 6 ADC_V[CR]1 ADC_V[CR]2 ADC_V[CR]3 ADC_V[CR]4 ADC_V[CR]5 ADC_V[CR]6 ADC_V[CR]7 ADC_CLK ADC_H-SYNC ADC_V-SYNC FROM/TO DIGITAL COMB 3D_Y/C_656OUT-0 5 3D_Y/C_656OUT-1 3D_Y/C_656OUT-2 3D_Y/C_656OUT-3 3D_Y/C_656OUT-4 3D_Y/C_656OUT-5 3D_Y/C_656OUT-6 3D_Y/C_656OUT-7 3D_Y/C_HD-OUT 3D_Y/C_VD-OUT 3D_Y/C_656-CLK 3D_Y/C_ODD/EVE 4 3 FROM/TO IN/OUT/REGULATOR P.CON+1.8V DIGITAL ANALOG P.CON+3.3V L3901 47uH B C D E F G SCALER SCHEMATIC DIAGRAM (SCALER PCB) 51 50 JG3903 120 +-1% 68 +-1% ANALOG_U_OUT JG3902 R3912 JG3901 120 +-1% ANALOG_Y_OUT ANALOG_V_OUT R3913 C3945 270 +-1% 0.1 B C3951 27P CH C3950 27P CH 3D_Y/C_656OUT-0 3D_Y/C_656-CLK 3D_Y/C_HD-OUT 3D_Y/C_VD-OUT 3D_Y/C_ODD/EVE 3D_Y/C_656OUT-7 3D_Y/C_656OUT-6 3D_Y/C_656OUT-5 3D_Y/C_656OUT-4 3D_Y/C_656OUT-3 3D_Y/C_656OUT-2 3D_Y/C_656OUT-1 R3933 1.5K X3901 C3943 49 13.5MHz R3915 C3948 16V 10V-S C3942 R3910 R3911 1M 5% 0.1 B 0.1 B C3933 0.1 B C3941 0.1 B C3940 0.1 B C3939 0.1 B C3938 0.1 B C3937 0.1 B C3936 0.1 B C3935 0.1 B C3934 0.1 B R3920 10K C3953 0.1 B C3952 0.1 B C39470.1 B C39460.1 B C3944 0.1 B R3902 10K R3901 R3918 10K 10K R3917 10K 1.8 1.8 0 0 (1.8V) AVDD_PLL_BE2 1.8 AVSS_PLL_BE2 0 AVSS_PLL_SDI 0 (1.8V) AVDD_PLL_SDI 1.8 (1.8V) AVDD_PLL_FE 1.8 AVSS_PLL_FE 0 DAC_PVSS 0 (1.8V) DAC_VDD 1.8 DAC_VSS 0 DAC_B_OUT 1.4 (3.3V) DAC_AVDDB 3.1 DAC_AVSSB 0 DAC_G_OUT 0.8 (3.3V) DAC_AVDDG 3.1 DAC_AVSSG 0 DAC_R_OUT 1.4 (3.3V) DAC_AVDDR 3.1 DAC_AVSSR 0 DAC_COMP 2.0 DAC_RSET 1.2 DAC_VREFOUT 1.3 DAC_VREFIN 1.3 (3.3V) DAC_AVDD 3.0 DAC_AVSS 0 DAC_GR_AVSS 0 (3.3V) DAC_GR_AVDD 3.1 (3.3V) DAC_PVDD 3.1 1.6 TEST0 0 TEST1 0 TEST2 0 XTAL OUT 1.6 (3.3V) VDD9 3.2 VSS 0 IN_CLK_PORT2 1.6 D1_IN_0 1.8 (1.8V) VDDcore8 1.8 VSScore 0 D1_IN_1 1.7 D1_IN_2 1.6 D1_IN_3 1.5 D1_IN_4 1.6 D1_IN_5 1.6 D1_IN_6 1.4 D1_IN_7 1.9 2.3 3.1 2.9 ADC_H-SYNC ADC_V-SYNC ADC_CLK W806 ADC_U[CB]0 ADC_U[CB]1 ADC_U[CB]2 ADC_U[CB]3 ADC_U[CB]4 ADC_U[CB]5 ADC_U[CB]6 ADC_U[CB]7 ADC_V[CR]0 ADC_V[CR]1 ADC_V[CR]2 ADC_V[CR]3 ADC_V[CR]4 ADC_V[CR]5 ADC_V[CR]6 ADC_V[CR]7 ADC_Y0 ADC_Y1 ADC_Y2 ADC_Y3 ADC_Y4 ADC_Y5 ADC_Y6 ADC_Y7 SCL R3905 SDA R3906 SOFT_RESET C3905 47P CH 470 470 C3906 47P CH W817 DIGITAL ANALOG W821 L3907 47uH C3901 0.1 B C3902 0.1 B C3903 0.1 B C3904 0.1 B R3907 C3907 0.1 470 B C3972 0.1 B 3.1 1.3 0 1.6 0 0 0 3.2 0 0 0.3 0.8 3.0 0.3 0.4 1.8 0 0.4 0 0.3 0.4 0.4 3.2 0 0 0 0 0 2.5 3.2 0 3.2 0.4 1.3 0.5 1.8 0 3.0 1.3 0 0 NC 0 R3903 3.2 10K 3.2 R3904 4.6 10K 4.6 3.4 3.2 0 1.3 1.3 1.2 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 208 207 206 205 204 203 202 201 200 199 198 197 196 195 194 193 192 191 190 189 188 187 186 185 184 183 182 181 180 179 178 177 176 175 174 173 172 171 170 169 168 167 166 165 164 163 162 161 160 159 158 157 0 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 XTAL IN IN_CLK1_PORT1 HSYNC2_PORT1 VSYNC2_PORT1 FIELD ID2_PORT1 VDD1 (3.3V) VSS IN_CLK2_PORT1 B/Cb/D1_0 B/Cb/D1_1 B/Cb/D1_2 B/Cb/D1_3 B/Cb/D1_4 VDDcore1 (1.8V) VSScore B/Cb/D1_5 B/Cb/D1_6 B/Cb/D1_7 R/Cr/Cb Cr_0 R/Cr/Cb Cr_1 R/Cr/Cb Cr_2 R/Cr/Cb Cr_3 R/Cr/Cb Cr_4 R/Cr/Cb Cr_5 R/Cr/Cb Cr_6 R/Cr/Cb Cr_7 G/Y/Y_0 VDD2 (3.3V) VSS G/Y/Y_1 G/Y/Y_2 G/Y/Y_3 G/Y/Y_4 VDDcore2 (1.8V) VSScore G/Y/Y_5 G/Y/Y_6 G/Y/Y_7 IN_SEL TEST DEV_ADDR1 DEV_ADDR0 SCLK SDATA RESET_N VDD3 (3.3V) VSS 1 HSYNC1_PORT1 2 VSYNC1_PORT1 3 FIELD ID1_PORT1 206 FIELD ID_PORT2 207 VSYNC_PORT2 208 HSYNC_PORT2 50 SDRAM DATA(0) 51 SDRAM DATA(1) 52 SDRAM DATA(2) 53 SDRAM DATA(3) 54 SDRAM DATA(4) 55 SDRAM DATA(5) 56 SDRAM DATA(6) 57 SDRAM DATA(7) IC3901 FLI2301-LF-BD SCALER NC1.9 NC1.9 154 G/Y/Y_OUT_6 155 G/Y/Y_OUT_7 156 OE G/Y/Y_OUT_5 G/Y/Y_OUT_4 G/Y/Y_OUT_3 G/Y/Y_OUT_2 G/Y/Y_OUT_1 G/Y/Y_OUT_0 VSS (3.3V) VDD8 R/V/Pr_OUT_7 NC2.2 NC2.4 NC1.9 NC2.0 NC1.5 NC1.4 0 3.2 NC2.1 157 PLL_PVDD (1.8V) 158 PLL_PVSS R/V/Pr_OUT_6 R/V/Pr_OUT_5 R/V/Pr_OUT_4 R/V/Pr_OUT_3 NC2.0 NC2.1 NC2.1 NC1.9 159 AVSS_PLL_BE1 R/V/Pr_OUT_2 VSScore 160 AVDD_PLL_BE1 (1.8V) (1.8V) VDDcore7 NC1.9 0 1.8 R/V/Pr_OUT_1 NC 1.7 R/V/Pr_OUT_0 NC 1.5 B/U/Pb_OUT_7 NC 1.9 B/U/Pb_OUT_6 NC 1.9 B/U/Pb_OUT_5 NC 2.1 B/U/Pb_OUT_4 NC 2.1 B/U/Pb_OUT_3 NC 1.9 B/U/Pb_OUT_2 VSS (3.3V) VDD7 NC 1.9 0 3.2 B/U/Pb_OUT_1 NC1.6 B/U/Pb_OUT_0 NC1.5 101 SDRAM ADDR(2) CLKOUT VSScore (1.8V) VDDcore6 CTLOUT4 NC1.6 0 1.8 NC 1.3 102 SDRAM ADDR(1) 103 SDRAM ADDR(0) 104 SDRAM WEN CTLOUT3 CTLOUT2 CTLOUT1 CTLOUT0 TEST OUT1 NC 0 NC 3.2 3.1 3.1 NC 0.6 105 SDRAM RASN 106 SDRAM CASN 107 SDRAM BA1 TEST OUT0 NC 0.3 TEST3 0 SDRAM CLKIN 0.3 VSS 0 (3.3V) VDD6 3.2 SDRAM CLKOUT 1.4 R3908 SDRAM DQM 0 100 SDRAM CSN 2.9 SDRAM BA0 2.7 2.8 3.0 3.0 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100101102103104 JG3904 JG3905 W807 C3932 0.1 B C3931 0.1 B C3930 0.1 B C3929 0.1 B C3928 0.1 B NR3912 4D03WGJ0000T5E NR3913 4D03WGJ0000T5E 1.4 2.2 1.6 SDRAM DATA(8) 1.6 SDRAM DATA(9) 1.6 SDRAM DATA(10) 1.8 SDRAM DATA(11) 3.2 VDD (3.3V) 0 VSS 1.7 SDRAM DATA(12) 1.2 SDRAM DATA(13) 1.7 SDRAM DATA(14) 1.5 SDRAM DATA(15) 1.8 VDDcore3 (1.8V) 0 VSScore 1.3 SDRAM DATA(16) 1.2 SDRAM DATA(17) 1.3 SDRAM DATA(18) 1.2 SDRAM DATA(19) 1.3 SDRAM DATA(20) 1.4 SDRAM DATA(21) 1.3 SDRAM DATA(22) 2.2 SDRAM DATA(23) 1.6 SDRAM DATA(24) 1.6 SDRAM DATA(25) 1.8 VDDcore4 (1.8V) 0 VSScore 1.6 SDRAM DATA(26) 1.7 SDRAM DATA(27) 1.7 SDRAM DATA(28) 1.2 SDRAM DATA(29) 1.7 SDRAM DATA(30) 1.5 SDRAM DATA(31) 3.2 VDD5 (3.3V) 0 VSS 0 TEST IN 0.2 SDRAM ADDR(10) 0.7 SDRAM ADDR(9) 0.9 SDRAM ADDR(8) 1.2 SDRAM ADDR(7) 1.2 SDRAM ADDR(6) 1.8 VDDcore5 (1.8V) 0 VSScore 1.2 SDRAM ADDR(5) 1.2 SDRAM ADDR(4) 1.2 SDRAM ADDR(3) 1.1 3.1 1.0 1.1 1.3 1.3 1.2 NC NC SDRAM_CLK DQM CSN BA0 BA1 CASN RASN WEN C3923 0.1 B C3924 0.1 B C3925 0.1 B C3926 0.1 B C3927 0.1 B C3908 0.01 B C3909 0.1 B C3910 6.3V 100 V-S C3911 0.1 B C3917 6.3V 100 V-S C3918 0.1 B C3919 0.1 B C3920 6.3V 100 V-S C3921 0.1 B C3922 6.3V 100 V-S 2 GND H 8 FROM/TO SDRAM DATA0 7 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 6 DATA20 DATA21 DATA22 DATA23 DATA24 DATA25 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31 ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 5 ADDR6 ADDR7 ADDR8 ADDR9 ADDR10 BA0 BA1 WEN CASN RASN CSN DQM SDRAM_CLK 4 FROM/TO IN/OUT/REGULATOR ANALOG_V_OUT ANALOG_Y_OUT ANALOG_U_OUT SOFT_RESET SCL SDA 3 2 4D03WGJ0000T5E NR3911 NC 4D03WGJ0000T5E NR3910 ADDR2 ADDR1 ADDR0 4D03WGJ0000T5E NR3909 ADDR6 ADDR5 ADDR4 ADDR3 4D03WGJ0000T5E NR3908 ADDR10 ADDR9 ADDR8 ADDR7 4D03WGJ0000T5E NR3907 DATA28 DATA29 DATA30 DATA31 4D03WGJ0000T5E NR3906 DATA24 DATA25 DATA26 DATA27 4D03WGJ0000T5E NR3905 DATA20 DATA21 DATA22 DATA23 4D03WGJ0000T5E NR3904 DATA16 DATA17 DATA18 DATA19 4D03WGJ0000T5E NR3903 DATA12 DATA13 DATA14 DATA15 4D03WGJ0000T5E NR3902 DATA8 DATA9 DATA10 DATA11 4D03WGJ0000T5E NR3901 DATA4 DATA5 DATA6 DATA7 NC DATA0 DATA1 DATA2 DATA3 1 A G-35 NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL. B C D NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE E F PCBDS0 1 CED020 G H G-36