Toshiba MW30G71 Service Manual - Page 106

A B 8 FROM/TO SCALER DATA0 DATA1 DATA2 DATA3 7 DATA4 DATA5 DATA6 DATA7 DATA8 DATA9 DATA10 DATA11 DATA12 DATA13 DATA14 DATA15 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 6 DATA22 DATA23 DATA24 DATA25 DATA26 DATA27 DATA28 DATA29 DATA30 DATA31 ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 ADDR8 5 ADDR9 ADDR10 BA0 BA1 WEN CASN RASN CSN DQM SDRAM_CLK 4 3 FROM/TO IN/OUT/REGULATOR 2 P.CON+3.3V GND 1 A B G-39 C3967 0.1 B C3968 6.3V 220 V-S 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 C D E F G SDRAM SCHEMATIC DIAGRAM (SCALER PCB) W830 DATA15 DATA14 DATA13 DATA12 DATA11 DATA10 DATA9 DATA8 SDRAM_CLK ADDR9 ADDR8 ADDR7 ADDR6 ADDR5 ADDR4 ADDR3 DATA31 DATA30 DATA29 DATA28 DATA27 DATA26 DATA25 DATA24 C3965 0.1 B C3964 0.1 B C3963 0.1 B C3962 0.1 B R3919 470 IC3902 SDRAM MT48LC2M32B2P-6(Y14W) 0 VSS 1.5 DQ15 0 VSSQ 1.7 DQ14 1.2 DQ13 3.1 VDDQ 1.7 DQ12 1.7 DQ11 0 VSSQ 0.2 DQ10 1.6 DQ9 3.1 VDDQ 1.6 DQ8 0.7 NC NC 0 VSS 0 DQM1 0.4 NC NC 0.5 NC NC 0.6 CLK 3.1 CKE 0.9 A9 0.9 A8 1.2 A7 1.2 A6 1.2 A5 1.2 A4 1.2 A3 0 DQM3 0 VSS 0.3 NC NC 1.5 DQ31 3.1 VDDQ 1.7 DQ30 1.3 DQ29 0 VSSQ 1.7 DQ28 1.7 DQ27 3.1 VDDQ 1.6 DQ26 1.6 DQ25 0 VSSQ 1.6 DQ24 0 VSS VDD 3.1 DQ0 1.3 VDDQ 3.1 DQ1 1.3 DQ2 1.2 VSSQ 0 DQ3 1.1 DQ4 1.3 VDDQ 3.1 DQ5 1.3 DQ6 1.3 VSSQ 0 DQ7 2.1 2.2 NC NC VDD 3.1 DQM0 0.1 WE# 3.1 CAS# 3.1 RAS# 3.0 CS# 2.9 0.2 NC NC BA0 2.7 BA1 2.8 A10 0.2 A0 1.0 A1 1.1 A2 1.1 DQM2 0.1 VDD 3.1 0.5 NC NC DQ16 1.3 VSSQ 0 DQ17 1.2 DQ18 1.3 VDDQ 3.1 DQ19 0.3 DQ20 1.3 VSSQ 0 DQ21 1.4 DQ22 1.3 VDDQ 3.1 DQ23 2.1 VDD 3.1 C3954 0.1 B C3955 0.1 B C3956 0.1 B C3957 0.1 B C3958 0.1 B C3959 0.1 B C3960 0.1 B C3961 0.1 B DATA0 DATA1 DATA2 DATA3 DATA4 DATA5 DATA6 DATA7 DQM WEN CASN RASN CSN BA0 BA1 ADDR10 ADDR0 ADDR1 ADDR2 DATA16 DATA17 DATA18 DATA19 DATA20 DATA21 DATA22 DATA23 NOTE:THE DC VOLTAGE AT EACH PART WAS MEASURED WITH THE DIGITAL TESTER WHEN THE COLOR BROADCAST WAS RECEIVED IN GOOD CONDITION AND PICTURE IS NORMAL. NOTE: THIS SCHEMATIC DIAGRAM IS THE LATEST AT THE TIME OF PRINTING AND SUBJECT TO CHANGE WITHOUT NOTICE C D E F G H 8 7 6 5 4 3 2 PCBDS0 CED020 H 1 G-40