ViewSonic VP720B Service Manual - Page 22

MTV512M64, FEATURES, PIN CONFIGURATION & DESCRIPTION, Low Power Reset LVR & Watchdog Timer

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The refresh functions, either Auto or Self Refresh are easy to use. In addition, EM6A9320 features programmable DLL option. By having a programmable mode register and extended mode register, the system can choose the most suitable modes to maximize its performance. These devices are well suited for applications requiring high memory bandwidth, result in a device particularly well suited to high performance main memory and graphics applicat MTV512M64 The MTV512M micro-controller is an 8051 CPU core embedded device especially tailored for flat panel display applications. It includes an 8051 CPU core,768-byte SRAM, 4 channels of 6-bit ADC, 3 external counters/timers, 6 channels of PWMDAC, VESA DDC interface, and a 64K-byte internal program Flash-ROM memory. FEATURES • 8051 core, CPU operating frequency up to 24MHz • 3.3V power supply • 768-byte RAM; 64K-byte program Flash memory • Maximum 6 channels of PWM DAC • Compliant with VESA DDC1/2B/2Bi/2B+/CI standard • Watchdog timer with programmable interval • Support external counters/timers, T0, T1, and ET2 • Single/double frequency clock output • Two clock output ports • Two external interrupts, INT1 is shared with Slave IIC interrupt source • Maximum 4 channels of 6-bit ADC • Flash-ROM code protection selection • Hardware ISP (In System Programming), no Boot Code required • Embedded Dual Ports DDCRAM (128-byte x 2 • Green products like Pb-Free Packages or All Green Packages available PIN CONFIGURATION & DESCRIPTION A "CMOS output pin" means it can sink and drive at least 4mA current. It is not recommended to use such pin as input function. An "open drain pin" means it can sink at least 4mA current. It can be used as input or output function and needs an external pull up resistor. An "8051 standard pin" is a pseudo open drain pin. It can sink at least 4mA current when output is at low level, and drives at least 4mA current for 160nS when output transits from low to high, then keeps driving at 120 uA to maintain the pin at high level. It can be used as input or output function. It needs an external pull up resistor when driving heavy load device. There is an internal pull-up resistance on each CMOS PAD and an internal pull-down resistance on each input Low Power Reset (LVR) & Watchdog Timer When the voltage level of power supply is below 2.4V (+/-0.4V) for a specific period of time, the LVR generates a chip reset signal. After the power supply is above 2.4V (+/-0.4V) INVERTER In order to drive the CCFLs embedded in the panel module, there is a half bridge inverter to convert by the controller. The input 12V up to hundreds of AC voltage output. The inverter is formed by symmetric in order to drive the separate lamp modules. The input stage consists of a PWM controller, half bridge inverter, and switching MOSFET to convert DC input into AC output. The output stage consists of a tuning capacitor, coupling capacitor, transformer, push-pull MOSFET pair to boost AC output up to hundreds of voltage. And one resister is serial to lamp for output voltage feedback. There are two signal to control the inverter which come from system. Logic "high" level which send to I901 is turn on the inverter. BRI signal control brightness by DC level which was integral from PWM signal. ViewSonic Corporation Confidential - Do Not Copy 19 VP720-1_VP720b-1

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The refresh functions, either Auto or Self Refresh are easy to use.
In addition, EM6A9320 features programmable DLL option. By having a programmable mode register
and extended mode register, the system can choose the most suitable modes to maximize its
performance.
These devices are well suited for applications requiring high memory bandwidth, result in a device
particularly well suited to high performance main memory and graphics applicat
MTV512M64
The MTV512M micro-controller is an 8051 CPU core embedded device especially tailored for flat
panel display applications. It includes an 8051 CPU core,768-byte SRAM, 4 channels of 6-bit ADC, 3
external counters/timers, 6 channels of PWMDAC, VESA DDC interface, and a 64K-byte internal
program Flash-ROM memory.
FEATURES
• 8051 core, CPU operating frequency up to 24MHz
• 3.3V power supply
• 768-byte RAM; 64K-byte program Flash memory
• Maximum 6 channels of PWM DAC
• Compliant with VESA DDC1/2B/2Bi/2B+/CI
standard
• Watchdog timer with programmable interval
• Support external counters/timers, T0, T1, and ET2
• Single/double frequency clock output
• Two clock output ports
• Two external interrupts, INT1 is shared with Slave
IIC interrupt source
• Maximum 4 channels of 6-bit ADC
• Flash-ROM code protection selection
• Hardware ISP (In System Programming), no Boot
Code required
• Embedded Dual Ports DDCRAM (128-byte x 2
• Green products like Pb-Free Packages or All Green Packages available
PIN CONFIGURATION & DESCRIPTION
A “CMOS output pin” means it can sink and drive at least 4mA current. It is not recommended to use
such pin as input function.
An “open drain pin” means it can sink at least 4mA current. It can be used as input or output function
and needs an external pull up resistor.
An “8051 standard pin” is a pseudo open drain pin. It can sink at least 4mA current when output is at
low level, and drives at least 4mA current for 160nS when output transits from low to high, then keeps
driving at 120 uA to maintain the pin at high level. It can be used as input or output function. It needs
an external pull up resistor when driving heavy load device.
There is an internal pull-up resistance on each CMOS PAD and an internal pull-down resistance on
each input
Low Power Reset (LVR) & Watchdog Timer
When the voltage level of power supply is below 2.4V (+/-0.4V) for a specific period of time, the LVR
generates a chip reset signal. After the power supply is above 2.4V (+/-0.4V)
INVERTER
In order to drive the CCFLs embedded in the panel module, there is a half bridge inverter to convert by
the controller.
The input 12V up to hundreds of AC voltage output.
The inverter is formed by symmetric in order to drive the separate lamp modules.
The input stage consists of a PWM controller, half bridge inverter, and switching MOSFET to convert
DC input into AC output.
The output stage consists of a tuning capacitor, coupling capacitor, transformer, push-pull MOSFET
pair to boost AC output up to hundreds of voltage.
And one resister is serial to lamp for output voltage feedback.
There are two signal to control the inverter which come from system.
Logic “high” level which send to I901 is turn on the inverter.
BRI signal control brightness by DC level which was integral from PWM signal.
ViewSonic Corporation
Confidential – Do Not Copy
VP720-1_VP720b-1
19